[PATCH] drm/i915/gvt: fix wrong offset when loading RCS mocs
Dong, Chuanxiao
chuanxiao.dong at intel.com
Tue Mar 21 01:36:21 UTC 2017
Sorry for adding a wrong address in the "to" list. Remove it.
> -----Original Message-----
> From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On
> Behalf Of Chuanxiao Dong
> Sent: Tuesday, March 21, 2017 9:32 AM
> To: umg-meego-handset-kernel at umglistsvr.jf.intel.com; intel-gvt-
> dev at lists.freedesktop.org
> Subject: [PATCH] drm/i915/gvt: fix wrong offset when loading RCS mocs
>
> Fix the wrong offset of the RCS specific mocs
>
> Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch")
>
> Signed-off-by: Chuanxiao Dong <chuanxiao.dong at intel.com>
> ---
> drivers/gpu/drm/i915/gvt/render.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/render.c
> b/drivers/gpu/drm/i915/gvt/render.c
> index 95ee091..0beb835 100644
> --- a/drivers/gpu/drm/i915/gvt/render.c
> +++ b/drivers/gpu/drm/i915/gvt/render.c
> @@ -207,7 +207,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int
> ring_id)
> l3_offset.reg = 0xb020;
> for (i = 0; i < 32; i++) {
> gen9_render_mocs_L3[i] = I915_READ(l3_offset);
> - I915_WRITE(l3_offset, vgpu_vreg(vgpu, offset));
> + I915_WRITE(l3_offset, vgpu_vreg(vgpu, l3_offset));
> POSTING_READ(l3_offset);
> l3_offset.reg += 4;
> }
> --
> 2.7.4
>
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