[PATCH] drm/i915/gvt: set shadow entry to scratch page while p2m failed

[Gao, Ping A]

On 2017/3/21 10:42, Zhenyu Wang wrote:
> On 2017.03.20 18:03:32 +0800, Xiaoguang Chen wrote:
>> Sometimes guest driver will only update partial of the GGTT entry then
>> access it. In this situation a failure will happen while translating
>> the gpa to hpa.
>> Now in this situation we let the corresponding shadow entry pointing
>> to a scratch page.
>>
>> Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
>> Signed-off-by: Xiaoguang Chen <xiaoguang.chen at intel.com>
>> ---
>>  drivers/gpu/drm/i915/gvt/gtt.c | 10 ++++++++--
>>  1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
>> index da73127..96aa30c 100644
>> --- a/drivers/gpu/drm/i915/gvt/gtt.c
>> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
>> @@ -1837,11 +1837,17 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
>>  		ret = gtt_entry_p2m(vgpu, &e, &m);
>>  		if (ret) {
>>  			gvt_vgpu_err("fail to translate guest gtt entry\n");
>> -			return ret;
>> +			/* guest driver may read/write the entry when partial
>> +			 * update the entry in this situation p2m will fail
>> +			 * settting the shadow entry to point to a scratch page
>> +			 */
>> +			ops->set_pfn(&m,
>> +			vgpu->gtt.scratch_pt[GTT_TYPE_GGTT_PTE].page_mfn);
>>  		}
> Have you seen Ping's comment to use GTT_TYPE_PPGTT_PTE_PT, otherwise this
> scratch page num seems invalid. Hmm, why we don't have scratch for GGTT?

gvt->gtt.scratch_ggtt_mfn, it's already have. :)

>
>>  	} else {
>>  		m = e;
>> -		m.val64 = 0;
>> +		ops->set_pfn(&m,
>> +		vgpu->gtt.scratch_pt[GTT_TYPE_GGTT_PTE].page_mfn);
>>  	}
>>  
>>  	ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index);
>> -- 
>> 2.7.4
>>
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