[PATCH v2] drm/i915: enable vGPU 48bit full PPGTT support
Zhang, Tina
tina.zhang at intel.com
Tue May 9 06:24:02 UTC 2017
> -----Original Message-----
> From: Wang, Hongbo
> Sent: Tuesday, May 9, 2017 11:11 AM
> To: Zhang, Tina <tina.zhang at intel.com>; intel-gvt-dev at lists.freedesktop.org
> Cc: Zhang, Tina <tina.zhang at intel.com>
> Subject: RE: [PATCH v2] drm/i915: enable vGPU 48bit full PPGTT support
>
> Is this the full patch set to enable vGPU 48bit full PPGTT?
> It seems I don't see the real codes to "enable" this function except the definition.
>
>
> Best regards.
> Hongbo
> Tel: +86-21-6116 7445
> MP: +86-1364 1793 689
> Mail: hongbo.wang at intel.com
>
>
> > -----Original Message-----
> > From: intel-gvt-dev
> > [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of Tina
> > Zhang
> > Sent: Tuesday, May 9, 2017 10:49 AM
> > To: intel-gvt-dev at lists.freedesktop.org
> > Cc: Zhang, Tina <tina.zhang at intel.com>
> > Subject: [PATCH v2] drm/i915: enable vGPU 48bit full PPGTT support
> >
> > This patch is to enable the vGPU 48bit full ppgtt support.
> >
> > v2. add vgt_caps to save vgpu capabilities. So far, only added
> > full ppgtt capability which can tell guest i915 driver whether
> > the full ppgtt feature can be provided by device mode.
> > (Zhi) (Zhenyu)
> >
> > Signed-off-by: Tina Zhang <tina.zhang at intel.com>
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c
> > b/drivers/gpu/drm/i915/gvt/vgpu.c index 6e3cbd8..23578c1 100644
> > --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> > +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> > @@ -43,6 +43,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
> > vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
> > vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
> > vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
> > + vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
> > vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
> > vgpu_aperture_gmadr_base(vgpu);
> > vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) = diff
> > --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index
> > b20ed16..6fbb808 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1910,6 +1910,7 @@ struct i915_workarounds {
> >
> > struct i915_virtual_gpu {
> > bool active;
> > + uint32_t caps;
> > };
> >
> > /* used in computing the new watermarks state */ diff --git
> > a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 8bab4ae..c03b509 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -141,8 +141,8 @@ int intel_sanitize_enable_ppgtt(struct
> > drm_i915_private *dev_priv,
> > has_full_ppgtt = dev_priv->info.has_full_ppgtt;
> > has_full_48bit_ppgtt = dev_priv->info.has_full_48bit_ppgtt;
> >
> > - if (intel_vgpu_active(dev_priv)) {
> > - /* emulation is too hard */
> > + if (intel_vgpu_active(dev_priv) &&
> > + !(i915_check_vgpu_cap(dev_priv) & VGT_CAPS_FULL_PPGTT)) {
> > has_full_ppgtt = false;
> > has_full_48bit_ppgtt = false;
> > }
The switch is here. Originally, we disable the full ppgtt in Linux guest by setting "has_full_ppgtt=false" and "has_full_48bit_ppgtt=false". The guest i915 full ppgtt feature is blocked by an issue, which is fixed by patch "reorder the shadow ppgtt update process by adding entry first". As we solved the issue, we can set the full ppgtt in guest i915 driver free. Considering there might be a compatibility issue if the new version kernel (with this patch) is used by guest and the old version (without this patch) is used by host, some logic is added here to tell the guest whether the host support the ppgtt (with this patch) or not.
> > diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> > b/drivers/gpu/drm/i915/i915_pvinfo.h
> > index c0cb297..a45f790 100644
> > --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> > +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> > @@ -53,12 +53,17 @@ enum vgt_g2v_type {
> > VGT_G2V_MAX,
> > };
> >
> > +enum vgt_caps_type {
> > + VGT_CAPS_FULL_PPGTT = (1 << 2),
> > +};
> > +
> > struct vgt_if {
> > u64 magic; /* VGT_MAGIC */
> > uint16_t version_major;
> > uint16_t version_minor;
> > u32 vgt_id; /* ID of vGT instance */
> > - u32 rsv1[12]; /* pad to offset 0x40 */
> > + uint32_t vgt_caps; /* VGT capabilties */
> > + u32 rsv1[11]; /* pad to offset 0x40 */
> > /*
> > * Data structure to describe the balooning info of resources.
> > * Each VM can only have one portion of continuous area for now.
> > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> > b/drivers/gpu/drm/i915/i915_vgpu.c
> > index 4ab8a97..b115127 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.c
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> > @@ -77,10 +77,16 @@ void i915_check_vgpu(struct drm_i915_private
> > *dev_priv)
> > return;
> > }
> >
> > + dev_priv->vgpu.caps = __raw_i915_read32(dev_priv,
> > +vgtif_reg(vgt_caps));
> > dev_priv->vgpu.active = true;
> > DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); }
> >
> > +uint32_t i915_check_vgpu_cap(struct drm_i915_private *dev_priv) {
> > + return dev_priv->vgpu.caps;
> > +}
> > +
> > struct _balloon_info_ {
> > /*
> > * There are up to 2 regions per mappable/unmappable graphic diff
> > --git a/drivers/gpu/drm/i915/i915_vgpu.h
> > b/drivers/gpu/drm/i915/i915_vgpu.h
> > index 3c3b2d2..9cdb25a 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.h
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> > @@ -27,6 +27,7 @@
> > #include "i915_pvinfo.h"
> >
> > void i915_check_vgpu(struct drm_i915_private *dev_priv);
> > +uint32_t i915_check_vgpu_cap(struct drm_i915_private *dev_priv);
> > int intel_vgt_balloon(struct drm_i915_private *dev_priv); void
> > intel_vgt_deballoon(struct drm_i915_private *dev_priv);
> >
> > --
> > 2.7.4
> >
> > _______________________________________________
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> > intel-gvt-dev at lists.freedesktop.org
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