[PATCH 1/2] drm/i915/gvt: add RING_INSTDONE and SC_INSTDONE mmio handler in GVT-g

[Zhenyu Wang]

On 2017.05.17 11:22:52 +0800, Weinan Li wrote:
> kernel hangcheck needs to check RING_INSTDONE and SC_INSTDONE registers'
> state to know if hardware is still running. In GVT-g environment, we need
> to emulate these registers change for all the vgpus, otherwise if one
> workload runs for a long time with no ACTHD and INSTDONE change will cause
> hangcheck failed then trigger gfx reset, especially in multi-vgpus
> environment, one vgpu has been scheduled out for a long time, it will try
> to check is there INSTDONE registers change to know if hardware is still
> running.
> 
> here we return the physical state for all the vgpus, let them know the
> hardware's running state, avoid unnecessary gfx reset from vgpu.
> 
> Signed-off-by: Weinan Li <weinan.z.li at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 23 +++++++++++++++++++++++
>  drivers/gpu/drm/i915/gvt/mmio.c     |  7 -------
>  2 files changed, 23 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index c995e54..a70892e 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -1409,6 +1409,23 @@ static int ring_timestamp_mmio_read(struct intel_vgpu *vgpu,
>  	return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
>  }
>  
> +static int instdone_mmio_read(struct intel_vgpu *vgpu,
> +		unsigned int offset, void *p_data, unsigned int bytes)
> +{
> +	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
> +
> +	if (offset == 0x206c) {
> +		gvt_vgpu_err("------------------------------------------\n");
> +		gvt_vgpu_err(" likely triggers a gfx reset or scheduled out for a long time.\n");
> +		gvt_vgpu_err("------------------------------------------\n");
> +		vgpu->mmio.disable_warn_untrack = true;
> +	}

So shouldn't remove this message completely here but might have some debug
info when guest really issue reset by GDRST write? 

> +
> +	vgpu_vreg(vgpu, offset) = I915_READ(_MMIO(offset));
> +	return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
> +
> +}
> +
>  static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
>  		void *p_data, unsigned int bytes)
>  {
> @@ -1593,6 +1610,12 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
>  	MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL);
>  #undef RING_REG
>  
> +#define RING_REG(base) (base + 0x6c)
> +	MMIO_RING_DFH(RING_REG, D_ALL, 0, instdone_mmio_read, NULL);
> +	MMIO_DH(RING_REG(GEN8_BSD2_RING_BASE), D_ALL, instdone_mmio_read, NULL);
> +#undef RING_REG
> +	MMIO_DH(GEN7_SC_INSTDONE, D_HSW_PLUS, instdone_mmio_read, NULL);
> +
>  	MMIO_GM_RDR(0x2148, D_ALL, NULL, NULL);
>  	MMIO_GM_RDR(CCID, D_ALL, NULL, NULL);
>  	MMIO_GM_RDR(0x12198, D_ALL, NULL, NULL);
> diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
> index 1ba3bdb..35f6c47 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio.c
> @@ -202,13 +202,6 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa,
>  		if (!vgpu->mmio.disable_warn_untrack) {
>  			gvt_vgpu_err("read untracked MMIO %x(%dB) val %x\n",
>  				offset, bytes, *(u32 *)p_data);
> -
> -			if (offset == 0x206c) {
> -				gvt_vgpu_err("------------------------------------------\n");
> -				gvt_vgpu_err("likely triggers a gfx reset\n");
> -				gvt_vgpu_err("------------------------------------------\n");
> -				vgpu->mmio.disable_warn_untrack = true;
> -			}
>  		}
>  	}
>  
> -- 
> 1.9.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
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