[PATCH] drm/i915/gvt: emulate gen9 dbuf ctl register access

[Zhang, Xiaolin]

On 08/10/2018 11:05 AM, Zhenyu Wang wrote:
> On 2018.08.07 20:39:16 +0800, Xiaolin Zhang wrote:
>> there is below call track at boot time when booting guest
>> with kabylake vgpu with specifal configuration and this try to fix it.
>>
> As you say KBL here but use D_SKL_PLUS for all gen9 devices, is it expected
> behavior?
Yes. it is an expected behavior. KBL observe this issue, but this
register is common for
all gen9 based device.
>
>> [drm:gen9_dbuf_enable [i915]] *ERROR* DBuf power enable timeout
>> ------------[ cut here ]------------
>> WARNING: gen9_dc_off_power_well_enable+0x224/0x230 [i915]
>> Unexpected DBuf power power state (0x8000000a)
>> Hardware name: Red Hat KVM, BIOS 1.11.0-2.el7 04/01/2014
>> Call Trace:
>>  [<ffffffff99d24408>] dump_stack+0x19/0x1b
>>  [<ffffffff996926d8>] __warn+0xd8/0x100
>>  [<ffffffff9969275f>] warn_slowpath_fmt+0x5f/0x80
>>  [<ffffffffc07bbae4>] gen9_dc_off_power_well_enable+0x224/0x230 [i915]
>>  [<ffffffffc07ba9d2>] intel_power_well_enable+0x42/0x50 [i915]
>>  [<ffffffffc07baa6a>] __intel_display_power_get_domain+0x8a/0xb0 [i915]
>>  [<ffffffffc07bdb93>] intel_display_power_get+0x33/0x50 [i915]
>>  [<ffffffffc07bdf95>] intel_display_set_init_power+0x45/0x50 [i915]
>>  [<ffffffffc07be003>] intel_power_domains_init_hw+0x63/0x8a0 [i915]
>>  [<ffffffffc07995c3>] i915_driver_load+0xae3/0x1760 [i915]
>>  [<ffffffff99bd6580>] ? nvmem_register+0x500/0x500
>>  [<ffffffffc07a476c>] i915_pci_probe+0x2c/0x50 [i915]
>>  [<ffffffff9999cfea>] local_pci_probe+0x4a/0xb0
>>  [<ffffffff9999e729>] pci_device_probe+0x109/0x160
>>  [<ffffffff99a79aa5>] driver_probe_device+0xc5/0x3e0
>>  [<ffffffff99a79ea3>] __driver_attach+0x93/0xa0
>>  [<ffffffff99a79e10>] ? __device_attach+0x50/0x50
>>  [<ffffffff99a77645>] bus_for_each_dev+0x75/0xc0
>>  [<ffffffff99a7941e>] driver_attach+0x1e/0x20
>>  [<ffffffff99a78ec0>] bus_add_driver+0x200/0x2d0
>>  [<ffffffff99a7a534>] driver_register+0x64/0xf0
>>  [<ffffffff9999df65>] __pci_register_driver+0xa5/0xc0
>>  [<ffffffffc0929000>] ? 0xffffffffc0928fff
>>  [<ffffffffc0929059>] i915_init+0x59/0x5c [i915]
>>  [<ffffffff9960210a>] do_one_initcall+0xba/0x240
>>  [<ffffffff9971108c>] load_module+0x272c/0x2bc0
>>  [<ffffffff9997b990>] ? ddebug_proc_write+0xf0/0xf0
>>  [<ffffffff997115e5>] SyS_init_module+0xc5/0x110
>>  [<ffffffff99d36795>] system_call_fastpath+0x1c/0x21
>>
>> Signed-off-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
>> ---
>>  drivers/gpu/drm/i915/gvt/handlers.c | 17 +++++++++++++++--
>>  1 file changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
>> index 060a6c0..e6a94a6 100644
>> --- a/drivers/gpu/drm/i915/gvt/handlers.c
>> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
>> @@ -1328,6 +1328,19 @@ static int power_well_ctl_mmio_write(struct intel_vgpu *vgpu,
>>  	return 0;
>>  }
>>  
>> +static int gen9_dbuf_ctl_mmio_write(struct intel_vgpu *vgpu,
>> +		unsigned int offset, void *p_data, unsigned int bytes)
>> +{
>> +	write_vreg(vgpu, offset, p_data, bytes);
>> +
>> +	if (vgpu_vreg(vgpu, offset) & DBUF_POWER_REQUEST)
>> +		vgpu_vreg(vgpu, offset) |= DBUF_POWER_STATE;
>> +	else
>> +		vgpu_vreg(vgpu, offset) &= ~DBUF_POWER_STATE;
>> +
>> +	return 0;
>> +}
>> +
>>  static int fpga_dbg_mmio_write(struct intel_vgpu *vgpu,
>>  	unsigned int offset, void *p_data, unsigned int bytes)
>>  {
>> @@ -2858,6 +2871,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>>  	MMIO_DH(HSW_PWR_WELL_CTL_DRIVER(SKL_DISP_PW_MISC_IO), D_SKL_PLUS, NULL,
>>  		skl_power_well_ctl_write);
>>  
>> +	MMIO_DH(DBUF_CTL, D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write);
>> +
>>  	MMIO_D(_MMIO(0xa210), D_SKL_PLUS);
>>  	MMIO_D(GEN9_MEDIA_PG_IDLE_HYSTERESIS, D_SKL_PLUS);
>>  	MMIO_D(GEN9_RENDER_PG_IDLE_HYSTERESIS, D_SKL_PLUS);
>> @@ -3033,8 +3048,6 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>>  		NULL, gen9_trtte_write);
>>  	MMIO_DH(_MMIO(0x4dfc), D_SKL_PLUS, NULL, gen9_trtt_chicken_write);
>>  
>> -	MMIO_D(_MMIO(0x45008), D_SKL_PLUS);
>> -
>>  	MMIO_D(_MMIO(0x46430), D_SKL_PLUS);
>>  
>>  	MMIO_D(_MMIO(0x46520), D_SKL_PLUS);
>> -- 
>> 2.7.4
>>
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