[PATCH v2] drm/i915/gvt: Handle GEN9_WM_CHICKEN3 with F_CMD_ACCESS for BXT.

[Zhao Yan]

GEN9_WM_CHICKEN3 is contained in render engine ctx, so it's reasonable to
have F_CMD_ACCESS flag.
one concern is that GEN9_WM_CHICKEN3 should be command accessible in skl
also, although in skl platform there's no LRI to program it yet. so do we
need to limit platform as D_BXT here?

On Thu, Aug 16, 2018 at 03:58:25PM +0800, Colin Xu wrote:
> Recent patch introduce strict check on scanning cmd:
> Commit 8d458ea0ec33 ("drm/i915/gvt: return error on cmd access")
> 
> Before 8d458ea0ec33, if cmd_reg_handler() checks that a cmd access a mmio
> that not marked as F_CMD_ACCESS, it simply returns 0 and log an error.
> Now it will return -EBADRQC which will cause the workload fail to submit.
> 
> On BXT, i915 applies WaClearHIZ_WM_CHICKEN3 which will program
> GEN9_WM_CHICKEN3 by LRI when init wa ctx. If it has no F_CMD_ACCESS flag,
> vgpu will fail to start. Also add F_MODE_MASK since it's mode mask reg.
> 
> v2: Refresh commit message to elaborate issue symptom in detail.
> 
> Signed-off-by: Colin Xu <colin.xu at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index cf2a4020949d..e32a69fabda3 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -3205,6 +3205,8 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
>  	MMIO_D(GEN8_L3SQCREG1, D_BXT);
>  
>  	MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);
> +	MMIO_DFH(GEN9_WM_CHICKEN3, D_BXT,
> +		 F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
>  
>  	return 0;
>  }
> -- 
> 2.18.0
> 
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