[PATCH v3] drm/i915/gvt: Handle GEN9_WM_CHICKEN3 with F_CMD_ACCESS.

[Zhao, Yan Y]

Acked-By: Zhao Yan<yan.y.zhao at intel.com>

> -----Original Message-----
> From: Xu, Colin
> Sent: Friday, August 17, 2018 4:42 PM
> To: zhenyuw at linux.intel.com; Zhao, Yan Y <yan.y.zhao at intel.com>
> Cc: intel-gvt-dev at lists.freedesktop.org
> Subject: [PATCH v3] drm/i915/gvt: Handle GEN9_WM_CHICKEN3 with
> F_CMD_ACCESS.
> 
> Recent patch introduce strict check on scanning cmd:
> Commit 8d458ea0ec33 ("drm/i915/gvt: return error on cmd access")
> 
> Before 8d458ea0ec33, if cmd_reg_handler() checks that a cmd access a mmio
> that not marked as F_CMD_ACCESS, it simply returns 0 and log an error.
> Now it will return -EBADRQC which will cause the workload fail to submit.
> 
> On BXT, i915 applies WaClearHIZ_WM_CHICKEN3 which will program
> GEN9_WM_CHICKEN3 by LRI when init wa ctx. If it has no F_CMD_ACCESS flag,
> vgpu will fail to start. Also add F_MODE_MASK since it's mode mask reg.
> 
> v2: Refresh commit message to elaborate issue symptom in detail.
> v3: Make SKL_PLUS share same handling since GEN9_WM_CHICKEN3 should be
>     F_CMD_ACCESS from HW aspect. (yan, zhenyu)
> 
> Signed-off-by: Colin Xu <colin.xu at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index cf2a4020949d..7e7fd8d604dc 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -3022,7 +3022,9 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>  	MMIO_D(_MMIO(0x44500), D_SKL_PLUS);
>  	MMIO_DFH(GEN9_CSFE_CHICKEN1_RCS, D_SKL_PLUS, F_CMD_ACCESS,
> NULL, NULL);
>  	MMIO_DFH(GEN8_HDC_CHICKEN1, D_SKL_PLUS, F_MODE_MASK |
> F_CMD_ACCESS,
> -		NULL, NULL);
> +		 NULL, NULL);
> +	MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK |
> F_CMD_ACCESS,
> +		 NULL, NULL);
> 
>  	MMIO_D(_MMIO(0x4ab8), D_KBL);
>  	MMIO_D(_MMIO(0x2248), D_KBL | D_SKL);
> --
> 2.18.0