[PATCH v3] drm/i915/gvt: Make correct handling to vreg BXT_PHY_CTL_FAMILY

[Zhenyu Wang]

On 2018.08.20 16:52:17 +0800, He, Min wrote:
> Looks good to me. Thanks.
> Reviewed-by: He, Min <min.he at intel.com>
>

Thanks a lot for reviewing this! Applied.

> On 8/20/2018 4:46 PM, Colin Xu wrote:
> > Guest kernel will write to BXT_PHY_CTL_FAMILY to reset DDI PHY
> > and pull BXT_PHY_CTL to check PHY status. Previous handling will
> > set/reset BXT_PHY_CTL of all PHYs at same time on receiving vreg
> > write to some BXT_PHY_CTL_FAMILY. If some BXT_PHY_CTL is already
> > enabled, following reset to another BXT_PHY_CTL_FAMILY will clear
> > the enabled BXT_PHY_CTL, which result in guest kernel print:
> > 
> > -----------------------------------
> > [drm:intel_ddi_get_hw_state [i915]]
> > *ERROR* Port B enabled but PHY powered down? (PHY_CTL 00000000)
> > -----------------------------------
> > 
> > The correct handling should operate BXT_PHY_CTL_FAMILY and
> > BXT_PHY_CTL on the same DDI.
> > 
> > v2: Use correct reg define. The naming looks confusing, however
> >      current i915_reg.h bind DPIO_PHY0 to _PHY_CTL_FAMILY_DDI and
> >      bind DPIO_PHY1 to _PHY_CTL_FAMILY_EDP, pairing to
> >      _BXT_PHY_CTL_DDI_A and _BXT_PHY_CTL_DDI_B respectively.
> > v3: v2 incorrectly map _PHY_CTL_FAMILY_EDP to _BXT_PHY_CTL_DDI_A.
> >      BXT_PHY_CTL() looks up DDI using PORTx but not PHYx. Based on
> >      DPIO_PHY to DDI mapping, make correct vreg handle to BXT_PHY_CTL
> >      on receiving vreg write to BXT_PHY_CTL_FAMILY. (He, Min)
> > 
> > Current mapping according to bxt_power_wells:
> > dpio-common-a:
> >      >>> DPIO_PHY1
> >      >>> BXT_DPIO_CMN_A_POWER_DOMAINS
> >      >>> POWER_DOMAIN_PORT_DDI_A_LANES
> >      >>> PORT_A
> > 
> > dpio-common-bc:
> >      >>> DPIO_PHY0
> >      >>> BXT_DPIO_CMN_BC_POWER_DOMAINS
> >      >>> POWER_DOMAIN_PORT_DDI_B_LANES | POWER_DOMAIN_PORT_DDI_C_LANES
> >      >>> PORT_B or PORT_C
> > 
> > Signed-off-by: Colin Xu <colin.xu at intel.com>
> > ---
> >   drivers/gpu/drm/i915/gvt/handlers.c | 12 +++++++++---
> >   1 file changed, 9 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> > index b47986a22332..44bdfb596e7d 100644
> > --- a/drivers/gpu/drm/i915/gvt/handlers.c
> > +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> > @@ -1526,9 +1526,15 @@ static int bxt_phy_ctl_family_write(struct intel_vgpu *vgpu,
> >   	u32 v = *(u32 *)p_data;
> >   	u32 data = v & COMMON_RESET_DIS ? BXT_PHY_LANE_ENABLED : 0;
> > -	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_A) = data;
> > -	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_B) = data;
> > -	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_C) = data;
> > +	switch (offset) {
> > +	case _PHY_CTL_FAMILY_EDP:
> > +		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_A) = data;
> > +		break;
> > +	case _PHY_CTL_FAMILY_DDI:
> > +		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_B) = data;
> > +		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_C) = data;
> > +		break;
> > +	}
> >   	vgpu_vreg(vgpu, offset) = v;
> 
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> intel-gvt-dev at lists.freedesktop.org
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