[RFC PATCH 0/7] drm/i915/gvt: Enable vGPU local display direct flip
tina.zhang at intel.com
Mon Dec 3 07:35:15 UTC 2018
This series is used to enable the local display direct flip feature for vGPUs
vGPU Local Display Direct Flip Feature
This feature provides vGPUs with the capablities to control a subset of
the local HW display engine resources to display output from a virtualized
With this local display direct flip feature, vGPUs can leverage HW display
engine's capablities to compose their framebuffers and post the final outputs
to the local display monitors.
1) Plane assignment
Host userspace is in charge of the plane assignment.The idea is to use a special
intel_framebuffer object called meta framebuffer to stand for a vGPU's plane in
the host-side, so that the plane assignment can be achieved with the existing KMS
ioctls (e.g. DRM_IOCTL_MODE_SETPLANE).
Meta framebuffers are created and initilized during vGPU creation. In order to
let userspace get the userspace ids of a vGPU's meta framebuffers, a new attribute
called "plane_id_index" is proposed. Userspace can echo the plane number to the
attribution and then use cat to dump the userspace id of the meta framebuffer
standing for that plane in the host-side.
The assignment doesn't need to be happened before a VM running with the vGPU. The
assignment can be dynamic.
2) vGPU page flip operation mediation
The main idea is to leverage the atomic framework in host to update the plane
registers on behalf of vGPUs, as vGPU cannot directly program these registers in
VMs. Here are the steps:
Step 1: GVT-g gets the plane state values from vGPU's plane registers.
Step 2: GVT-g updates the fields of the meta framebuffer with the values decoded
from the vGPU's plane state.
The fields of the meta framebuffer will be updated every time when the vGPU does
page flip operation so that the meta framebuffer can describe the vGPU's framebuffer
attached on the plane all the time.
Although most of the virtual plane state can be decoded back into the fields of
the drm_framebuffer to leverage the host atomic framework to program this state
values to the hardware plane registers, there are still a few of them cannot be
handled in this way. For the plane state values like PLANE_SURF, this patch set
just programs the HW register with the values got from vGPU's plane registers
Step 3: With this special drm_framebuffer, the vGPU's direct page flip can be
conducted through the host atomic framework. And we leverage both async atomic
plane update framework and sync atomic plane update framework. If the vGPU's page
flip request can be satisfied through updating plane registers, the async atomic
plane update is used as the fast path to do the plane update. Otherwise, it means
the vGPU's page flip needs to recalculate display resources like DDB, so the sync
atomic plane update framework is used instead.
3) vGPU interrupt
This patch-set provides each vGPU with the hardware vblank interrupt event.
- drm/i915: Introduce meta framebuffer
Introduce the meta framebuffer object.
- drm/i915/gvt: Use meta fbs to stand for vGPU's planes
Make GVT-g as the meta framebuffer producor and introduce a new attribute
called "plane_id_index" for userspace to get the id through sys.
- drm/i915: Introduce async plane update to i915
- drm/i915: Extend async plane update to other planes
These two patches are used to discuss the async plane update i915 support.
- drm/i915/gvt: Introduce vGPU plane page flip framework
- drm/i915/gvt: Enable guest direct page flip
These are about the vGPU page flip operation mediation implementation.
- drm/i915/gvt: Introduce HW Vblank interrupt to vGPU
Enable vGPU's to use HW vblank interrupt event.
Here are some interesting candidates:
- Assigning planes with defaults during host booting
This feature aims to provide a way for host i915 do the plane assignment without
- Host i915 DDB fixed allocation support.
This feature will provide a fixed DDB allocation for each HW planes.
- Cursor plane assignment
This work can enable cursor plane assignment.
- Guest YUV framebuffer decoding
Some YUV framebuffer information cannot be decoded correctly. More fields might
be added to meta_framebuffer structure to save them, just like what we hand the
PLANE_SURF in this series.
- Guest framebuffer rotation feature support
Need to be handled like the PLANE_SURF in the series.
Tina Zhang (7):
drm/i915: Introduce meta framebuffer
drm/i915/gvt: Use meta fbs to stand for vGPU's planes
drm/i915: Introduce async plane update to i915
drm/i915: Extend async plane update to other planes
drm/i915/gvt: Introduce vGPU plane page flip framework
drm/i915/gvt: Enable guest direct page flip
drm/i915/gvt: Introduce HW Vblank interrupt to vGPU
drivers/gpu/drm/i915/gvt/display.c | 445 +++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/gvt/display.h | 21 +-
drivers/gpu/drm/i915/gvt/gvt.c | 112 ++++++++
drivers/gpu/drm/i915/gvt/gvt.h | 19 ++
drivers/gpu/drm/i915/gvt/handlers.c | 42 ++-
drivers/gpu/drm/i915/gvt/interrupt.c | 54 ++++
drivers/gpu/drm/i915/gvt/interrupt.h | 2 +
drivers/gpu/drm/i915/gvt/kvmgt.c | 46 +++
drivers/gpu/drm/i915/intel_atomic_plane.c | 66 +++++
drivers/gpu/drm/i915/intel_display.c | 11 +
drivers/gpu/drm/i915/intel_drv.h | 15 +
drivers/gpu/drm/i915/intel_sprite.c | 19 +-
12 files changed, 836 insertions(+), 16 deletions(-)
More information about the intel-gvt-dev