[PATCH 0/5] enable host preemption in GVT-g

Weinan Li weinan.z.li at intel.com
Thu Feb 8 06:31:50 UTC 2018


There is one issue relates to Coarse Power Gating(CPG) on KBL NUC in GVT-g,
vgpu can't get the correct default context by updating the registers before
inhibit context submission. It always get back the hardware default value
except the inhibit context submission happened before the 1st time
forcewake put. With this wrong default context, vgpu will run with
incorrect state and meet unknown issues.

The reason should be gpu hardware go down RC6, then all the mmios are reset
as default, then one inhibit context from vgpu load hardware default values
in context state image.

The solution is initialize these mmios by adding lri command in ring buffer
of the inhibit context, then gpu hardware has no chance to go down RC6,
vgpu can get correct default context for further use.

This patch set contains 5 patches, the 1st and 2nd both are code refine for
the real fix patches, the 3nd patch 'add 0xe4f0 into gen9 render list' is
one critical fix for missing necessary mmio in Gen9 render mmio list, the
4th patch 'init mmio by lri command in vgpu inhibit context' is the fix for
uncorrect back default context, without these 2 patches, gpu hang may be
occurred during vgpu switch. The 5th patch is revert the work around patch
for disable host preemtpion in GVT-g.

Weinan Li (5):
  drm/i915/gvt: add define GEN9_MOCS_SIZE
  drm/i915/gvt: add interface to check if context is inhibit
  drm/i915/gvt: add 0xe4f0 into gen9 render list
  drm/i915/gvt: init mmio by lri command in vgpu inhibit context
  Revert "drm/i915/gvt: set max priority for gvt context"

 drivers/gpu/drm/i915/gvt/mmio_context.c | 190 +++++++++++++++++++++++++++++---
 drivers/gpu/drm/i915/gvt/mmio_context.h |   5 +
 drivers/gpu/drm/i915/gvt/scheduler.c    |  14 ++-
 3 files changed, 193 insertions(+), 16 deletions(-)

-- 
1.9.1



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