[PATCH v3 2/3] drm/i915/gvt: add interface to check if context is inhibit

[Tian, Kevin]

> From: Weinan Li
> Sent: Monday, February 12, 2018 3:08 PM
> 
> No functional change, just for easy to use.
> 
> Signed-off-by: Weinan Li <weinan.z.li at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/mmio_context.c | 18 +++++++++++-------
>  drivers/gpu/drm/i915/gvt/mmio_context.h |  2 ++
>  2 files changed, 13 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c
> b/drivers/gpu/drm/i915/gvt/mmio_context.c
> index 99bc148..62a43b0 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio_context.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
> @@ -296,6 +296,16 @@ static void switch_mocs(struct intel_vgpu *pre,
> struct intel_vgpu *next,
> 
>  #define CTX_CONTEXT_CONTROL_VAL	0x03
> 
> +bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)
> +{
> +	u32 *reg_state = ctx->engine[ring_id].lrc_reg_state;
> +	u32 inhibit_mask =
> +
> 	_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
> +
> +	return inhibit_mask ==
> +		(reg_state[CTX_CONTEXT_CONTROL_VAL] & inhibit_mask);
> +}
> +
>  /* Switch ring mmio values (context). */
>  static void switch_mmio(struct intel_vgpu *pre,
>  			struct intel_vgpu *next,
> @@ -303,9 +313,6 @@ static void switch_mmio(struct intel_vgpu *pre,
>  {
>  	struct drm_i915_private *dev_priv;
>  	struct intel_vgpu_submission *s;
> -	u32 *reg_state, ctx_ctrl;
> -	u32 inhibit_mask =
> -
> 	_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
>  	struct engine_mmio *mmio;
>  	u32 old_v, new_v;
> 
> @@ -330,16 +337,13 @@ static void switch_mmio(struct intel_vgpu *pre,
>  		// restore
>  		if (next) {
>  			s = &next->submission;
> -			reg_state =
> -				s->shadow_ctx-
> >engine[ring_id].lrc_reg_state;
> -			ctx_ctrl = reg_state[CTX_CONTEXT_CONTROL_VAL];
>  			/*
>  			 * if it is an inhibit context, load in_context mmio
>  			 * into HW by mmio write. If it is not, skip this mmio
>  			 * write.

can you also fix above comment? it's not good for caller to describe callee
behavior (whether use mmio write or lri). should just stay with whether
required to load in_context mmio.

>  			 */
>  			if (mmio->in_context &&
> -			    (ctx_ctrl & inhibit_mask) != inhibit_mask)
> +			    !is_inhibit_context(s->shadow_ctx, ring_id))
>  				continue;
> 
>  			if (mmio->mask)
> diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.h
> b/drivers/gpu/drm/i915/gvt/mmio_context.h
> index ca2c6a7..4df87c7 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio_context.h
> +++ b/drivers/gpu/drm/i915/gvt/mmio_context.h
> @@ -49,4 +49,6 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre,
> 
>  void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt);
> 
> +bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id);
> +
>  #endif
> --
> 1.9.1
> 
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