[PATCH] drm/i915/gvt: update register's vreg on lri command in indirect context
hang.yuan at linux.intel.com
hang.yuan at linux.intel.com
Tue Jun 19 07:50:22 UTC 2018
From: Hang Yuan <hang.yuan at linux.intel.com>
Commit cd7e 61b9"init mmio by lri command in vgpu inhibit context"
initializes registers saved/restored in context with its vreg value
through lri command in ring buffer. It relies on vreg got updated
on every guest access. There is a case that guest uses lri command
in indirect-ctx to update these register. This patch adds vreg update
on this case.
Fixes: cd7e61b9("drm/i915/gvt: init mmio by lri command in vgpu inhibit context")
Signed-off-by: Hang Yuan <hang.yuan at linux.intel.com>
Signed-off-by: Weinan Li <weinan.z.li at intel.com>
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 15 +++++++++++++++
drivers/gpu/drm/i915/gvt/gvt.h | 2 ++
drivers/gpu/drm/i915/gvt/mmio_context.c | 5 ++++-
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index b51c05d..a8b9fb9 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -857,6 +857,18 @@ static int mocs_cmd_reg_handler(struct parser_exec_state *s,
return 0;
}
+static inline bool is_in_context_mmio(
+ struct intel_gvt *gvt, unsigned int offset)
+{
+ return gvt->mmio.mmio_attribute[offset >> 2] & F_IN_CONTEXT;
+}
+
+static void in_context_reg_handler(struct parser_exec_state *s,
+ unsigned int offset, unsigned int index)
+{
+ vgpu_vreg(s->vgpu, offset) = cmd_val(s, index + 1);
+}
+
static int cmd_reg_handler(struct parser_exec_state *s,
unsigned int offset, unsigned int index, char *cmd)
{
@@ -894,6 +906,9 @@ static int cmd_reg_handler(struct parser_exec_state *s,
patch_value(s, cmd_ptr(s, index), VGT_PVINFO_PAGE);
}
+ if ((is_in_context_mmio(gvt, offset)) && !strncmp(cmd, "lri", 3))
+ in_context_reg_handler(s, offset, index);
+
/* TODO: Update the global mask if this MMIO is a masked-MMIO */
intel_gvt_mmio_set_cmd_accessed(gvt, offset);
return 0;
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 362e3d5..7465267 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -274,6 +274,8 @@ struct intel_gvt_mmio {
#define F_CMD_ACCESSED (1 << 5)
/* This reg could be accessed by unaligned address */
#define F_UNALIGN (1 << 6)
+/* This reg is save/restore in context */
+#define F_IN_CONTEXT (1 << 7)
struct gvt_mmio_block *mmio_block;
unsigned int num_mmio_block;
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 708170e..2c7af69 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -581,7 +581,10 @@ void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt)
for (mmio = gvt->engine_mmio_list.mmio;
i915_mmio_reg_valid(mmio->reg); mmio++) {
- if (mmio->in_context)
+ if (mmio->in_context) {
gvt->engine_mmio_list.ctx_mmio_count[mmio->ring_id]++;
+ gvt->mmio.mmio_attribute[mmio->reg.reg >> 2] |=
+ F_IN_CONTEXT;
+ }
}
}
--
2.7.4
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