[gvt-linux:gvt-next 36/36] drivers/gpu/drm/i915/gvt/handlers.c:2811:2: error: incompatible types when initializing type 'unsigned int' using type 'i915_reg_t'
Xu, Colin
colin.xu at intel.com
Thu Mar 15 08:43:56 UTC 2018
Hi Zhenyu,
I saw the defect commit has been merged to gvt-staging so rebase to latest staging and prepare a fix patch.
Please kindly take a look.
Thanks in advance.
Best Regards,
Colin Xu
>-----Original Message-----
>From: Zhenyu Wang [mailto:zhenyuw at linux.intel.com]
>Sent: Thursday, March 15, 2018 13:43
>To: Wu, Fengguang <fengguang.wu at intel.com>
>Cc: Xu, Colin <colin.xu at intel.com>; kbuild-all at 01.org; Zhu, Libo
><libo.zhu at intel.com>; Xu, Terrence <terrence.xu at intel.com>;
>intel-gvt-dev at lists.freedesktop.org
>Subject: Re: [gvt-linux:gvt-next 36/36]
>drivers/gpu/drm/i915/gvt/handlers.c:2811:2: error: incompatible types when
>initializing type 'unsigned int' using type 'i915_reg_t'
>
>
>Good catch! I missed that. Colin, pls fix it against latest staging branch. Thx.
>
>On 2018.03.15 13:14:22 +0800, kbuild test robot wrote:
>> tree: https://github.com/01org/gvt-linux.git gvt-next
>> head: 2eaa5fb5df1c7072f7c4a5e2cd8d8bcf6329b203
>> commit: 2eaa5fb5df1c7072f7c4a5e2cd8d8bcf6329b203 [36/36] drm/i915/gvt:
>Add below registers to default mmio handler
>> config: x86_64-randconfig-g0-03151205 (attached as .config)
>> compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
>> reproduce:
>> git checkout 2eaa5fb5df1c7072f7c4a5e2cd8d8bcf6329b203
>> # save the attached .config to linux build tree
>> make ARCH=x86_64
>>
>> All errors (new ones prefixed by >>):
>>
>> drivers/gpu/drm/i915/gvt/handlers.c: In function 'init_skl_mmio_info':
>> >> drivers/gpu/drm/i915/gvt/handlers.c:2811:2: error: incompatible types
>when initializing type 'unsigned int' using type 'i915_reg_t'
>> MMIO_D(_MMIO(RPM_CONFIG0), D_SKL_PLUS);
>> ^
>> drivers/gpu/drm/i915/gvt/handlers.c:2813:2: error: incompatible types
>when initializing type 'unsigned int' using type 'i915_reg_t'
>> MMIO_D(_MMIO(RC6_LOCATION), D_SKL_PLUS);
>> ^
>>
>> vim +2811 drivers/gpu/drm/i915/gvt/handlers.c
>>
>> 2627
>> 2628 static int init_skl_mmio_info(struct intel_gvt *gvt)
>> 2629 {
>> 2630 struct drm_i915_private *dev_priv = gvt->dev_priv;
>> 2631 int ret;
>> 2632
>> 2633 MMIO_DH(FORCEWAKE_RENDER_GEN9, D_SKL_PLUS,
>NULL, mul_force_wake_write);
>> 2634 MMIO_DH(FORCEWAKE_ACK_RENDER_GEN9, D_SKL_PLUS,
>NULL, NULL);
>> 2635 MMIO_DH(FORCEWAKE_BLITTER_GEN9, D_SKL_PLUS,
>NULL, mul_force_wake_write);
>> 2636 MMIO_DH(FORCEWAKE_ACK_BLITTER_GEN9, D_SKL_PLUS,
>NULL, NULL);
>> 2637 MMIO_DH(FORCEWAKE_MEDIA_GEN9, D_SKL_PLUS, NULL,
>mul_force_wake_write);
>> 2638 MMIO_DH(FORCEWAKE_ACK_MEDIA_GEN9, D_SKL_PLUS,
>NULL, NULL);
>> 2639
>> 2640 MMIO_F(_MMIO(_DPB_AUX_CH_CTL), 6 * 4, 0, 0, 0,
>D_SKL_PLUS, NULL,
>> 2641 dp_aux_ch_ctl_mmio_write);
>> 2642 MMIO_F(_MMIO(_DPC_AUX_CH_CTL), 6 * 4, 0, 0, 0,
>D_SKL_PLUS, NULL,
>> 2643 dp_aux_ch_ctl_mmio_write);
>> 2644 MMIO_F(_MMIO(_DPD_AUX_CH_CTL), 6 * 4, 0, 0, 0,
>D_SKL_PLUS, NULL,
>> 2645 dp_aux_ch_ctl_mmio_write);
>> 2646
>> 2647 /*
>> 2648 * Use an arbitrary power well controlled by the
>PWR_WELL_CTL
>> 2649 * register.
>> 2650 */
>> 2651
> MMIO_D(HSW_PWR_WELL_CTL_BIOS(SKL_DISP_PW_MISC_IO),
>D_SKL_PLUS);
>> 2652
> MMIO_DH(HSW_PWR_WELL_CTL_DRIVER(SKL_DISP_PW_MISC_IO),
>D_SKL_PLUS, NULL,
>> 2653 skl_power_well_ctl_write);
>> 2654
>> 2655 MMIO_D(_MMIO(0xa210), D_SKL_PLUS);
>> 2656 MMIO_D(GEN9_MEDIA_PG_IDLE_HYSTERESIS,
>D_SKL_PLUS);
>> 2657 MMIO_D(GEN9_RENDER_PG_IDLE_HYSTERESIS,
>D_SKL_PLUS);
>> 2658 MMIO_DFH(GEN9_GAMT_ECO_REG_RW_IA, D_SKL_PLUS,
>F_CMD_ACCESS, NULL, NULL);
>> 2659 MMIO_DH(_MMIO(0x4ddc), D_SKL_PLUS, NULL, NULL);
>> 2660 MMIO_DH(_MMIO(0x42080), D_SKL_PLUS, NULL, NULL);
>> 2661 MMIO_D(_MMIO(0x45504), D_SKL_PLUS);
>> 2662 MMIO_D(_MMIO(0x45520), D_SKL_PLUS);
>> 2663 MMIO_D(_MMIO(0x46000), D_SKL_PLUS);
>> 2664 MMIO_DH(_MMIO(0x46010), D_SKL | D_KBL, NULL,
>skl_lcpll_write);
>> 2665 MMIO_DH(_MMIO(0x46014), D_SKL | D_KBL, NULL,
>skl_lcpll_write);
>> 2666 MMIO_D(_MMIO(0x6C040), D_SKL | D_KBL);
>> 2667 MMIO_D(_MMIO(0x6C048), D_SKL | D_KBL);
>> 2668 MMIO_D(_MMIO(0x6C050), D_SKL | D_KBL);
>> 2669 MMIO_D(_MMIO(0x6C044), D_SKL | D_KBL);
>> 2670 MMIO_D(_MMIO(0x6C04C), D_SKL | D_KBL);
>> 2671 MMIO_D(_MMIO(0x6C054), D_SKL | D_KBL);
>> 2672 MMIO_D(_MMIO(0x6c058), D_SKL | D_KBL);
>> 2673 MMIO_D(_MMIO(0x6c05c), D_SKL | D_KBL);
>> 2674 MMIO_DH(_MMIO(0x6c060), D_SKL | D_KBL,
>dpll_status_read, NULL);
>> 2675
>> 2676 MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2677 MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2678 MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2679 MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2680 MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2681 MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2682
>> 2683 MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2684 MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2685 MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2686 MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2687 MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2688 MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2689
>> 2690 MMIO_DH(SKL_PS_CTRL(PIPE_A, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2691 MMIO_DH(SKL_PS_CTRL(PIPE_A, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2692 MMIO_DH(SKL_PS_CTRL(PIPE_B, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2693 MMIO_DH(SKL_PS_CTRL(PIPE_B, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2694 MMIO_DH(SKL_PS_CTRL(PIPE_C, 0), D_SKL_PLUS, NULL,
>pf_write);
>> 2695 MMIO_DH(SKL_PS_CTRL(PIPE_C, 1), D_SKL_PLUS, NULL,
>pf_write);
>> 2696
>> 2697 MMIO_DH(PLANE_BUF_CFG(PIPE_A, 0), D_SKL_PLUS, NULL,
>NULL);
>> 2698 MMIO_DH(PLANE_BUF_CFG(PIPE_A, 1), D_SKL_PLUS, NULL,
>NULL);
>> 2699 MMIO_DH(PLANE_BUF_CFG(PIPE_A, 2), D_SKL_PLUS, NULL,
>NULL);
>> 2700 MMIO_DH(PLANE_BUF_CFG(PIPE_A, 3), D_SKL_PLUS, NULL,
>NULL);
>> 2701
>> 2702 MMIO_DH(PLANE_BUF_CFG(PIPE_B, 0), D_SKL_PLUS, NULL,
>NULL);
>> 2703 MMIO_DH(PLANE_BUF_CFG(PIPE_B, 1), D_SKL_PLUS, NULL,
>NULL);
>> 2704 MMIO_DH(PLANE_BUF_CFG(PIPE_B, 2), D_SKL_PLUS, NULL,
>NULL);
>> 2705 MMIO_DH(PLANE_BUF_CFG(PIPE_B, 3), D_SKL_PLUS, NULL,
>NULL);
>> 2706
>> 2707 MMIO_DH(PLANE_BUF_CFG(PIPE_C, 0), D_SKL_PLUS, NULL,
>NULL);
>> 2708 MMIO_DH(PLANE_BUF_CFG(PIPE_C, 1), D_SKL_PLUS, NULL,
>NULL);
>> 2709 MMIO_DH(PLANE_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL,
>NULL);
>> 2710 MMIO_DH(PLANE_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL,
>NULL);
>> 2711
>> 2712 MMIO_DH(CUR_BUF_CFG(PIPE_A), D_SKL_PLUS, NULL,
>NULL);
>> 2713 MMIO_DH(CUR_BUF_CFG(PIPE_B), D_SKL_PLUS, NULL,
>NULL);
>> 2714 MMIO_DH(CUR_BUF_CFG(PIPE_C), D_SKL_PLUS, NULL,
>NULL);
>> 2715
>> 2716 MMIO_F(PLANE_WM(PIPE_A, 0, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2717 MMIO_F(PLANE_WM(PIPE_A, 1, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2718 MMIO_F(PLANE_WM(PIPE_A, 2, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2719
>> 2720 MMIO_F(PLANE_WM(PIPE_B, 0, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2721 MMIO_F(PLANE_WM(PIPE_B, 1, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2722 MMIO_F(PLANE_WM(PIPE_B, 2, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2723
>> 2724 MMIO_F(PLANE_WM(PIPE_C, 0, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2725 MMIO_F(PLANE_WM(PIPE_C, 1, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2726 MMIO_F(PLANE_WM(PIPE_C, 2, 0), 4 * 8, 0, 0, 0,
>D_SKL_PLUS, NULL, NULL);
>> 2727
>> 2728 MMIO_F(CUR_WM(PIPE_A, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS,
>NULL, NULL);
>> 2729 MMIO_F(CUR_WM(PIPE_B, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS,
>NULL, NULL);
>> 2730 MMIO_F(CUR_WM(PIPE_C, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS,
>NULL, NULL);
>> 2731
>> 2732 MMIO_DH(PLANE_WM_TRANS(PIPE_A, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2733 MMIO_DH(PLANE_WM_TRANS(PIPE_A, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2734 MMIO_DH(PLANE_WM_TRANS(PIPE_A, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2735
>> 2736 MMIO_DH(PLANE_WM_TRANS(PIPE_B, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2737 MMIO_DH(PLANE_WM_TRANS(PIPE_B, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2738 MMIO_DH(PLANE_WM_TRANS(PIPE_B, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2739
>> 2740 MMIO_DH(PLANE_WM_TRANS(PIPE_C, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2741 MMIO_DH(PLANE_WM_TRANS(PIPE_C, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2742 MMIO_DH(PLANE_WM_TRANS(PIPE_C, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2743
>> 2744 MMIO_DH(CUR_WM_TRANS(PIPE_A), D_SKL_PLUS, NULL,
>NULL);
>> 2745 MMIO_DH(CUR_WM_TRANS(PIPE_B), D_SKL_PLUS, NULL,
>NULL);
>> 2746 MMIO_DH(CUR_WM_TRANS(PIPE_C), D_SKL_PLUS, NULL,
>NULL);
>> 2747
>> 2748 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2749 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2750 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2751 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_A, 3), D_SKL_PLUS,
>NULL, NULL);
>> 2752
>> 2753 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2754 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2755 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2756 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_B, 3), D_SKL_PLUS,
>NULL, NULL);
>> 2757
>> 2758 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 0), D_SKL_PLUS,
>NULL, NULL);
>> 2759 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 1), D_SKL_PLUS,
>NULL, NULL);
>> 2760 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 2), D_SKL_PLUS,
>NULL, NULL);
>> 2761 MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 3), D_SKL_PLUS,
>NULL, NULL);
>> 2762
>> 2763 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2764 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2765 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2766 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2767
>> 2768 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2769 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2770 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2771 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2772
>> 2773 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2774 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2775 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2776 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2777
>> 2778 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2779 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2780 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2781 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2782
>> 2783 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2784 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2785 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2786 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2787
>> 2788 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 1)), D_SKL_PLUS,
>NULL, NULL);
>> 2789 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 2)), D_SKL_PLUS,
>NULL, NULL);
>> 2790 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 3)), D_SKL_PLUS,
>NULL, NULL);
>> 2791 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 4)), D_SKL_PLUS,
>NULL, NULL);
>> 2792
>> 2793 MMIO_D(_MMIO(0x70380), D_SKL_PLUS);
>> 2794 MMIO_D(_MMIO(0x71380), D_SKL_PLUS);
>> 2795 MMIO_D(_MMIO(0x72380), D_SKL_PLUS);
>> 2796 MMIO_D(_MMIO(0x7239c), D_SKL_PLUS);
>> 2797 MMIO_D(_MMIO(0x7039c), D_SKL_PLUS);
>> 2798
>> 2799 MMIO_D(_MMIO(0x8f074), D_SKL | D_KBL);
>> 2800 MMIO_D(_MMIO(0x8f004), D_SKL | D_KBL);
>> 2801 MMIO_D(_MMIO(0x8f034), D_SKL | D_KBL);
>> 2802
>> 2803 MMIO_D(_MMIO(0xb11c), D_SKL | D_KBL);
>> 2804
>> 2805 MMIO_D(_MMIO(0x51000), D_SKL | D_KBL);
>> 2806 MMIO_D(_MMIO(0x6c00c), D_SKL_PLUS);
>> 2807
>> 2808 MMIO_F(_MMIO(0xc800), 0x7f8, F_CMD_ACCESS, 0, 0,
>D_SKL | D_KBL, NULL, NULL);
>> 2809 MMIO_F(_MMIO(0xb020), 0x80, F_CMD_ACCESS, 0, 0,
>D_SKL | D_KBL, NULL, NULL);
>> 2810
>> > 2811 MMIO_D(_MMIO(RPM_CONFIG0), D_SKL_PLUS);
>> 2812 MMIO_D(_MMIO(0xd08), D_SKL_PLUS);
>> 2813 MMIO_D(_MMIO(RC6_LOCATION), D_SKL_PLUS);
>> 2814 MMIO_DFH(_MMIO(0x20e0), D_SKL_PLUS, F_MODE_MASK,
>NULL, NULL);
>> 2815 MMIO_DFH(_MMIO(0x20ec), D_SKL_PLUS, F_MODE_MASK
>| F_CMD_ACCESS, NULL, NULL);
>> 2816
>> 2817 /* TRTT */
>> 2818 MMIO_DFH(_MMIO(0x4de0), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, NULL);
>> 2819 MMIO_DFH(_MMIO(0x4de4), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, NULL);
>> 2820 MMIO_DFH(_MMIO(0x4de8), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, NULL);
>> 2821 MMIO_DFH(_MMIO(0x4dec), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, NULL);
>> 2822 MMIO_DFH(_MMIO(0x4df0), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, NULL);
>> 2823 MMIO_DFH(_MMIO(0x4df4), D_SKL | D_KBL,
>F_CMD_ACCESS, NULL, gen9_trtte_write);
>> 2824 MMIO_DH(_MMIO(0x4dfc), D_SKL | D_KBL, NULL,
>gen9_trtt_chicken_write);
>> 2825
>> 2826 MMIO_D(_MMIO(0x45008), D_SKL | D_KBL);
>> 2827
>> 2828 MMIO_D(_MMIO(0x46430), D_SKL | D_KBL);
>> 2829
>> 2830 MMIO_D(_MMIO(0x46520), D_SKL | D_KBL);
>> 2831
>> 2832 MMIO_D(_MMIO(0xc403c), D_SKL | D_KBL);
>> 2833 MMIO_D(_MMIO(0xb004), D_SKL_PLUS);
>> 2834 MMIO_DH(DMA_CTRL, D_SKL_PLUS, NULL,
>dma_ctrl_write);
>> 2835
>> 2836 MMIO_D(_MMIO(0x65900), D_SKL_PLUS);
>> 2837 MMIO_D(_MMIO(0x1082c0), D_SKL | D_KBL);
>> 2838 MMIO_D(_MMIO(0x4068), D_SKL | D_KBL);
>> 2839 MMIO_D(_MMIO(0x67054), D_SKL | D_KBL);
>> 2840 MMIO_D(_MMIO(0x6e560), D_SKL | D_KBL);
>> 2841 MMIO_D(_MMIO(0x6e554), D_SKL | D_KBL);
>> 2842 MMIO_D(_MMIO(0x2b20), D_SKL | D_KBL);
>> 2843 MMIO_D(_MMIO(0x65f00), D_SKL | D_KBL);
>> 2844 MMIO_D(_MMIO(0x65f08), D_SKL | D_KBL);
>> 2845 MMIO_D(_MMIO(0x320f0), D_SKL | D_KBL);
>> 2846
>> 2847 MMIO_D(_MMIO(0x70034), D_SKL_PLUS);
>> 2848 MMIO_D(_MMIO(0x71034), D_SKL_PLUS);
>> 2849 MMIO_D(_MMIO(0x72034), D_SKL_PLUS);
>> 2850
>> 2851 MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A)),
>D_SKL_PLUS);
>> 2852 MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B)),
>D_SKL_PLUS);
>> 2853 MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C)),
>D_SKL_PLUS);
>> 2854 MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A)),
>D_SKL_PLUS);
>> 2855 MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B)),
>D_SKL_PLUS);
>> 2856 MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C)),
>D_SKL_PLUS);
>> 2857 MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A)),
>D_SKL_PLUS);
>> 2858 MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B)),
>D_SKL_PLUS);
>> 2859 MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C)),
>D_SKL_PLUS);
>> 2860
>> 2861 MMIO_D(_MMIO(0x44500), D_SKL_PLUS);
>> 2862 MMIO_DFH(GEN9_CSFE_CHICKEN1_RCS, D_SKL_PLUS,
>F_CMD_ACCESS, NULL, NULL);
>> 2863 MMIO_DFH(GEN8_HDC_CHICKEN1, D_SKL | D_KBL,
>F_MODE_MASK | F_CMD_ACCESS,
>> 2864 NULL, NULL);
>> 2865
>> 2866 MMIO_D(_MMIO(0x4ab8), D_KBL);
>> 2867 MMIO_D(_MMIO(0x2248), D_SKL_PLUS | D_KBL);
>> 2868
>> 2869 return 0;
>> 2870 }
>> 2871
>>
>> ---
>> 0-DAY kernel test infrastructure Open Source Technology
>Center
>> https://lists.01.org/pipermail/kbuild-all Intel
>Corporation
>
>
>
>--
>Open Source Technology Center, Intel ltd.
>
>$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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