[PATCH] drm/i915/gvt: Fix compiling error caused by 2eaa5fb

[Zhenyu Wang]

On 2018.03.16 16:41:18 +0800, Colin Xu wrote:
> 2eaa5fb add some register to default mmio handler.
> Should init i915_reg_t using uint32_t, not MMIO.
> (caught by test robot + gcc-4.9 Debian 4.9.4-2, zhenyu)
> 
> Signed-off-by: Colin Xu <colin.xu at intel.com>
> ---

I might have wrongly pushed your last one, should remove that
from -next and regen staging. Pls redo with your original patch.

>  drivers/gpu/drm/i915/gvt/handlers.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 8af7c0af6e75..e69206961c7b 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -2808,9 +2808,9 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>  	MMIO_F(_MMIO(0xc800), 0x7f8, F_CMD_ACCESS, 0, 0, D_SKL | D_KBL, NULL, NULL);
>  	MMIO_F(_MMIO(0xb020), 0x80, F_CMD_ACCESS, 0, 0, D_SKL | D_KBL, NULL, NULL);
>  
> -	MMIO_D(_MMIO(RPM_CONFIG0), D_SKL_PLUS);
> +	MMIO_D(_MMIO(0xd00), D_SKL_PLUS);

Should be MMIO_D(RPM_CONFIG0, D_SKL_PLUS);

>  	MMIO_D(_MMIO(0xd08), D_SKL_PLUS);
> -	MMIO_D(_MMIO(RC6_LOCATION), D_SKL_PLUS);
> +	MMIO_D(_MMIO(0xd40), D_SKL_PLUS);

ditto

>  	MMIO_DFH(_MMIO(0x20e0), D_SKL_PLUS, F_MODE_MASK, NULL, NULL);
>  	MMIO_DFH(_MMIO(0x20ec), D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
>  
> -- 
> 2.16.2
> 
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> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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