[PATCH v1 5/5] drm/i915/gvt: GVTg support ppgtt pvmmio optimization

[Zhenyu Wang]

On 2018.11.05 17:57:55 +0800, Zhenyu Wang wrote:
> On 2018.11.05 17:20:49 +0800, Xiaolin Zhang wrote:
> > This patch handles ppgtt update from g2v notification.
> > 
> > It read out ppgtt pte entries from guest pte tables page and
> > convert them to host pfns.
> > 
> > It creates local ppgtt tables and insert the content pages
> > into the local ppgtt tables directly, which does not track
> > the usage of guest page table and removes the cost of write
> > protection from the original shadow page mechansim.
> > 
> > v1: rebase
> > v0: RFC
> > 
> > Cc: Zhenyu Wang <zhenyuw at linux.intel.com>
> > Cc: Zhi Wang <zhi.a.wang at intel.com>
> > Cc: Min He<min.he at intel.com>
> > Cc: Fei Jiang <fei.jiang at intel.com>
> > Cc: Zhipeng Gong <zhipeng.gong at intel.com>
> > Cc: Hang Yuan <hang.yuan at intel.com>
> > Cc: Zhiyuan Lv <zhiyuan.lv at intel.com>
> > Signed-off-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/gtt.c      | 318 ++++++++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/gvt/gtt.h      |   9 +
> >  drivers/gpu/drm/i915/gvt/handlers.c |  13 +-
> >  3 files changed, 338 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> > index 58e166e..8d3e21a 100644
> > --- a/drivers/gpu/drm/i915/gvt/gtt.c
> > +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> > @@ -1744,6 +1744,26 @@ static int ppgtt_handle_guest_write_page_table_bytes(
> >  	return 0;
> >  }
> >  
> > +static void invalidate_mm_pv(struct intel_vgpu_mm *mm)
> > +{
> > +	struct intel_vgpu *vgpu = mm->vgpu;
> > +	struct intel_gvt *gvt = vgpu->gvt;
> > +	struct intel_gvt_gtt *gtt = &gvt->gtt;
> > +	struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;
> > +	struct intel_gvt_gtt_entry se;
> > +
> > +	i915_ppgtt_close(&mm->ppgtt->vm);
> > +	i915_ppgtt_put(mm->ppgtt);
> > +
> > +	ppgtt_get_shadow_root_entry(mm, &se, 0);
> > +	if (!ops->test_present(&se))
> > +		return;
> > +	se.val64 = 0;
> > +	ppgtt_set_shadow_root_entry(mm, &se, 0);
> > +
> > +	mm->ppgtt_mm.shadowed  = false;
> > +}
> > +
> >  static void invalidate_ppgtt_mm(struct intel_vgpu_mm *mm)
> >  {
> >  	struct intel_vgpu *vgpu = mm->vgpu;
> > @@ -1756,6 +1776,11 @@ static void invalidate_ppgtt_mm(struct intel_vgpu_mm *mm)
> >  	if (!mm->ppgtt_mm.shadowed)
> >  		return;
> >  
> > +	if (VGPU_PVMMIO(mm->vgpu) & PVMMIO_PPGTT_UPDATE) {
> > +		invalidate_mm_pv(mm);
> > +		return;
> > +	}
> > +
> >  	for (index = 0; index < ARRAY_SIZE(mm->ppgtt_mm.shadow_pdps); index++) {
> >  		ppgtt_get_shadow_root_entry(mm, &se, index);
> >  
> > @@ -1773,6 +1798,26 @@ static void invalidate_ppgtt_mm(struct intel_vgpu_mm *mm)
> >  	mm->ppgtt_mm.shadowed = false;
> >  }
> >  
> > +static int shadow_mm_pv(struct intel_vgpu_mm *mm)
> > +{
> > +	struct intel_vgpu *vgpu = mm->vgpu;
> > +	struct intel_gvt *gvt = vgpu->gvt;
> > +	struct intel_gvt_gtt_entry se;
> > +
> > +	mm->ppgtt = i915_ppgtt_create(gvt->dev_priv, NULL);
> > +	if (IS_ERR(mm->ppgtt)) {
> > +		gvt_vgpu_err("fail to create ppgtt for pdp 0x%llx\n",
> > +				px_dma(&mm->ppgtt->pml4));
> > +		return PTR_ERR(mm->ppgtt);
> > +	}
> 
> Now vgpu context has already had its ppgtt when create, you need to
> refresh against that.
> 

Sorry I was thinking as our context has aligned ppgtt for each guest
context but we're not there yet..

-- 
Open Source Technology Center, Intel ltd.

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