[PATCH] drm/i915/gvt: remove call trace in plane scaling handler

He, Min min.he at intel.com
Thu Apr 18 01:28:33 UTC 2019


Henry,
When guest is trying to use the plane scaler, it will write to the PS_CTRL register
on every plane update. And we don’t have mechanisms to notify the guest that
scaler is not available. So if you modify it to gvt_vgpu_err(), it will cause massive
dmesg logs in dom0, what's why we used WARN_ON_ONCE() to log it.

Thanks.

> -----Original Message-----
> From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On
> Behalf Of hang.yuan at linux.intel.com
> Sent: Wednesday, April 17, 2019 6:41 PM
> To: intel-gvt-dev at lists.freedesktop.org
> Cc: Hang Yuan <hang.yuan at linux.intel.com>
> Subject: [PATCH] drm/i915/gvt: remove call trace in plane scaling handler
> 
> From: Hang Yuan <hang.yuan at linux.intel.com>
> 
> On guest MMIO access to scale a plane, print message but no
> call trace dumped.
> 
> Signed-off-by: Hang Yuan <hang.yuan at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index 18f01ee..d3d6788 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -1298,8 +1298,7 @@ static int pf_write(struct intel_vgpu *vgpu,
>  	if ((offset == _PS_1A_CTRL || offset == _PS_2A_CTRL ||
>  	   offset == _PS_1B_CTRL || offset == _PS_2B_CTRL ||
>  	   offset == _PS_1C_CTRL) && (val & PS_PLANE_SEL_MASK) != 0) {
> -		WARN_ONCE(true, "VM(%d): guest is trying to scaling a
> plane\n",
> -			  vgpu->id);
> +		gvt_vgpu_err("unsupported display plane scaling
> operation\n");
>  		return 0;
>  	}
> 
> --
> 2.7.4
> 
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