[PATCH v2] drm/i915/gvt: Fix guest boot warning

[Zhenyu Wang]

On 2019.12.14 00:45:08 +0800, Gao Fred wrote:
>     Simulate MIA core in reset status once GUC engine is reset.
> 
>     v2: 1. use vgpu_vreg_t() function,
>         2. clear MIA_IN_RESET after reading. (Zhenyu)
> 
> Signed-off-by: Gao Fred <fred.gao at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index bb9fe6bf5275..8e84850197e0 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -341,6 +341,10 @@ static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
>  			gvt_dbg_mmio("vgpu%d: request VCS2 Reset\n", vgpu->id);
>  			engine_mask |= BIT(VCS1);
>  		}
> +		if (data & GEN9_GRDOM_GUC) {
> +			gvt_dbg_mmio("vgpu%d: request GUC Reset\n", vgpu->id);
> +			vgpu_vreg_t(vgpu, GUC_STATUS) |= GS_MIA_IN_RESET;
> +		}
>  		engine_mask &= INTEL_INFO(vgpu->gvt->dev_priv)->engine_mask;
>  	}
>  
> @@ -1636,6 +1640,14 @@ static int edp_psr_imr_iir_write(struct intel_vgpu *vgpu,
>  	return 0;
>  }
>  
> +static int guc_status_read(struct intel_vgpu *vgpu,
> +		unsigned int offset, void *p_data, unsigned int bytes)
> +{
> +	read_vreg(vgpu, offset, p_data, bytes);
> +	vgpu_vreg(vgpu, offset) &= ~GS_MIA_IN_RESET;

hmm, return data before clear reset bit? Seems that should be reversed.

> +	return 0;
> +}
> +
>  static int mmio_read_from_hw(struct intel_vgpu *vgpu,
>  		unsigned int offset, void *p_data, unsigned int bytes)
>  {
> @@ -2672,6 +2684,8 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
>  
>  	MMIO_DH(EDP_PSR_IMR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);
>  	MMIO_DH(EDP_PSR_IIR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);
> +	MMIO_DH(GUC_STATUS, D_ALL, guc_status_read, NULL);
> +
>  	return 0;
>  }
>  
> -- 
> 2.17.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
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