[PATCH] drm/i915/gvt: Fix MI_FLUSH_DW parsing with correct index check
Zhenyu Wang
zhenyuw at linux.intel.com
Mon Feb 18 06:46:53 UTC 2019
When MI_FLUSH_DW post write hw status page in index mode, the index
value is in dword step. This fixes wrong qword step in cmd parser code
which incorrectly stopped VM for invalid MI_FLUSH_DW write index.
Fixes: be1da7070aea ("drm/i915/gvt: vGPU command scanner")
Cc: stable at vger.kernel.org # v4.10+
Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 35b4ec3f7618..d42f7a2dc82f 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -1441,7 +1441,7 @@ static inline int cmd_address_audit(struct parser_exec_state *s,
}
if (index_mode) {
- if (guest_gma >= I915_GTT_PAGE_SIZE / sizeof(u64)) {
+ if (guest_gma >= I915_GTT_PAGE_SIZE / sizeof(u32)) {
ret = -EFAULT;
goto err;
}
--
2.20.1
More information about the intel-gvt-dev
mailing list