[PATCH 1/2] drm/i915/gvt: Refine the snapshort range of I915 MCHBAR to optimize gvt-g boot time
Zhao, Yakui
yakui.zhao at intel.com
Mon Feb 18 08:58:03 UTC 2019
>-----Original Message-----
>From: intel-gvt-dev [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On
>Behalf Of Zhenyu Wang
>Sent: Monday, February 18, 2019 3:54 PM
>To: Zhao, Yakui <yakui.zhao at intel.com>
>Cc: intel-gvt-dev at lists.freedesktop.org
>Subject: Re: [PATCH 1/2] drm/i915/gvt: Refine the snapshort range of I915
>MCHBAR to optimize gvt-g boot time
>
>On 2019.02.14 17:09:16 +0800, Zhao Yakui wrote:
>> Currently it will take the snapshot of the MCHBAR registers for gvt-g
>> initialization so that it can be used for guest vgpu. And it will
>> cover from 0x140000 to 0x17ffff. In fact based on the HW spec most of
>> them are meanlingless and some time is wasted to read these register.
>> Only the range of 0x144000 to 0x147fff contains the valid definition.
>> So the range of capturing I915 MCHBAR register is refined, which helps
>> to optimize the gvt-g boot time.
>>
>> Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
>> ---
>> drivers/gpu/drm/i915/gvt/handlers.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
>> b/drivers/gpu/drm/i915/gvt/handlers.c
>> index bc64b81..0877678 100644
>> --- a/drivers/gpu/drm/i915/gvt/handlers.c
>> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
>> @@ -47,6 +47,8 @@
>> #define PCH_PP_OFF_DELAYS _MMIO(0xc720c) #define PCH_PP_DIVISOR
>> _MMIO(0xc7210)
>>
>> +#define MCHBAR_MEM_BASE
> _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x4000)
>> +
>
>Pls move this to reg.h which we include all GVT specific define (yeah, I know
>those PCH define looks odd, need to clean it up anyway).
Thanks for the review.
OK. It will be moved to reg.h in next version.
>
>> unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt) {
>> if (IS_BROADWELL(gvt->dev_priv))
>> @@ -3265,7 +3267,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt
>> *gvt)
>> /* Special MMIO blocks. */
>> static struct gvt_mmio_block mmio_blocks[] = {
>> {D_SKL_PLUS, _MMIO(CSR_MMIO_START_RANGE), 0x3000, NULL,
>NULL},
>> - {D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x40000, NULL, NULL},
>> + {D_ALL, MCHBAR_MEM_BASE, 0x4000, NULL, NULL},
>> {D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE,
>> pvinfo_mmio_read, pvinfo_mmio_write},
>> {D_ALL, LGC_PALETTE(PIPE_A, 0), 1024, NULL, NULL},
>> --
>
>I think that's fine, as for recent HW guest drivers shouldn't depend on
>anything in head range of MCHBAR.
>
>Acked-by: Zhenyu Wang <zhenyuw at linux.intel.com>
>
>--
>Open Source Technology Center, Intel ltd.
>
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