[PATCH] drm/i915/gvt: add F_CMD_ACCESS flag for wa regs

Zhenyu Wang zhenyuw at linux.intel.com
Mon Jun 3 05:14:13 UTC 2019


On 2019.06.02 23:48:45 -0400, Yan Zhao wrote:
> Acked-by: Yan Zhao <yan.y.zhao at intel.com>
>

Thanks for the patch and review! Applied this.

> On Fri, May 31, 2019 at 03:33:48PM +0800, Weinan Li wrote:
> > Instead of updating by MMIO write, all of the wa regs are initialized by
> > wa_ctx. From host side, it should make this behavior as expected, add
> > 'F_CMD_ACCESS' flag to these regs and allow access by commands.
> > 
> > [  123.557608] gvt: vgpu 2: srm access to non-render register (b11c)
> > [  123.563728] gvt: vgpu 2: MI_STORE_REGISTER_MEM handler error
> > [  123.569409] gvt: vgpu 2: cmd parser error
> > [  123.573424] 0x0
> > [  123.573425] 0x24
> > 
> > [  123.578686] gvt: vgpu 2: scan workload error
> > [  123.582958] GVT Internal error  for the guest
> > [  123.587317] Now vgpu 2 will enter failsafe mode.
> > [  123.591938] gvt: vgpu 2: failed to submit desc 0
> > [  123.596557] gvt: vgpu 2: fail submit workload on ring 0
> > [  123.601786] gvt: vgpu 2: fail to emulate MMIO write 00002230 len 4
> > 
> > Signed-off-by: Weinan Li <weinan.z.li at intel.com>
> > Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/handlers.c | 13 +++++++------
> >  1 file changed, 7 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> > index 7732caa1a546..a6ade66349bd 100644
> > --- a/drivers/gpu/drm/i915/gvt/handlers.c
> > +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> > @@ -1924,7 +1924,8 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
> >  	MMIO_DFH(_MMIO(0x20dc), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(_3D_CHICKEN3, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(_MMIO(0x2088), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> > -	MMIO_DFH(_MMIO(0x20e4), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> > +	MMIO_DFH(FF_SLICE_CS_CHICKEN2, D_ALL,
> > +		 F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(_MMIO(0x2470), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(GAM_ECOCHK, D_ALL, F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(GEN7_COMMON_SLICE_CHICKEN1, D_ALL, F_MODE_MASK | F_CMD_ACCESS,
> > @@ -3028,7 +3029,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
> >  	MMIO_D(CSR_HTP_SKL, D_SKL_PLUS);
> >  	MMIO_D(CSR_LAST_WRITE, D_SKL_PLUS);
> >  
> > -	MMIO_D(BDW_SCRATCH1, D_SKL_PLUS);
> > +	MMIO_DFH(BDW_SCRATCH1, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);
> >  
> >  	MMIO_D(SKL_DFSM, D_SKL_PLUS);
> >  	MMIO_D(DISPIO_CR_TX_BMU_CR0, D_SKL_PLUS);
> > @@ -3041,8 +3042,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
> >  	MMIO_D(RPM_CONFIG0, D_SKL_PLUS);
> >  	MMIO_D(_MMIO(0xd08), D_SKL_PLUS);
> >  	MMIO_D(RC6_LOCATION, D_SKL_PLUS);
> > -	MMIO_DFH(GEN7_FF_SLICE_CS_CHICKEN1, D_SKL_PLUS, F_MODE_MASK,
> > -		NULL, NULL);
> > +	MMIO_DFH(GEN7_FF_SLICE_CS_CHICKEN1, D_SKL_PLUS,
> > +		 F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DFH(GEN9_CS_DEBUG_MODE1, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
> >  		NULL, NULL);
> >  
> > @@ -3061,7 +3062,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
> >  	MMIO_D(_MMIO(0x46520), D_SKL_PLUS);
> >  
> >  	MMIO_D(_MMIO(0xc403c), D_SKL_PLUS);
> > -	MMIO_D(_MMIO(0xb004), D_SKL_PLUS);
> > +	MMIO_DFH(GEN8_GARBCNTL, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);
> >  	MMIO_DH(DMA_CTRL, D_SKL_PLUS, NULL, dma_ctrl_write);
> >  
> >  	MMIO_D(_MMIO(0x65900), D_SKL_PLUS);
> > @@ -3273,7 +3274,7 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
> >  	MMIO_D(GEN8_PUSHBUS_ENABLE, D_BXT);
> >  	MMIO_D(GEN8_PUSHBUS_SHIFT, D_BXT);
> >  	MMIO_D(GEN6_GFXPAUSE, D_BXT);
> > -	MMIO_D(GEN8_L3SQCREG1, D_BXT);
> > +	MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);
> >  
> >  	MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);
> >  
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
> > intel-gvt-dev mailing list
> > intel-gvt-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 195 bytes
Desc: not available
URL: <https://lists.freedesktop.org/archives/intel-gvt-dev/attachments/20190603/666d929b/attachment.sig>


More information about the intel-gvt-dev mailing list