[PATCH v2 2/2] drm/i915/gvt: Change fb_info->size from pages to bytes
Xiong Zhang
xiong.y.zhang at intel.com
Mon Mar 25 08:29:20 UTC 2019
fb_info->size is in pages, but some function need bytes when it
is a parameter. Such as:
a. intel_gvt_ggtt_validate_range() according to function definition
b. vfio_device_gfx_plane_info->size according to the comment of
its definition
This patch change fb_info->size into bytes.
v2: Keep fb_info->size in real size instead of assigning casted
page size(zhenyu)
Signed-off-by: Xiong Zhang <xiong.y.zhang at intel.com>
---
drivers/gpu/drm/i915/gvt/dmabuf.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c b/drivers/gpu/drm/i915/gvt/dmabuf.c
index 5d887f7..4855b1a 100644
--- a/drivers/gpu/drm/i915/gvt/dmabuf.c
+++ b/drivers/gpu/drm/i915/gvt/dmabuf.c
@@ -45,6 +45,7 @@ static int vgpu_gem_get_pages(
int i, ret;
gen8_pte_t __iomem *gtt_entries;
struct intel_vgpu_fb_info *fb_info;
+ u32 page_num;
fb_info = (struct intel_vgpu_fb_info *)obj->gvt_info;
if (WARN_ON(!fb_info))
@@ -54,14 +55,15 @@ static int vgpu_gem_get_pages(
if (unlikely(!st))
return -ENOMEM;
- ret = sg_alloc_table(st, fb_info->size, GFP_KERNEL);
+ page_num = (fb_info->size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+ ret = sg_alloc_table(st, page_num, GFP_KERNEL);
if (ret) {
kfree(st);
return ret;
}
gtt_entries = (gen8_pte_t __iomem *)dev_priv->ggtt.gsm +
(fb_info->start >> PAGE_SHIFT);
- for_each_sg(st->sgl, sg, fb_info->size, i) {
+ for_each_sg(st->sgl, sg, page_num, i) {
sg->offset = 0;
sg->length = PAGE_SIZE;
sg_dma_address(sg) =
@@ -157,8 +159,7 @@ static struct drm_i915_gem_object *vgpu_create_gem(struct drm_device *dev,
if (obj == NULL)
return NULL;
- drm_gem_private_object_init(dev, &obj->base,
- info->size << PAGE_SHIFT);
+ drm_gem_private_object_init(dev, &obj->base, info->size);
i915_gem_object_init(obj, &intel_vgpu_gem_ops);
obj->read_domains = I915_GEM_DOMAIN_GTT;
@@ -210,6 +211,7 @@ static int vgpu_get_plane_info(struct drm_device *dev,
struct intel_vgpu_primary_plane_format p;
struct intel_vgpu_cursor_plane_format c;
int ret;
+ u32 page_num;
if (plane_id == DRM_PLANE_TYPE_PRIMARY) {
ret = intel_vgpu_decode_primary_plane(vgpu, &p);
@@ -264,8 +266,9 @@ static int vgpu_get_plane_info(struct drm_device *dev,
return -EINVAL;
}
- info->size = (info->stride * info->height + PAGE_SIZE - 1)
- >> PAGE_SHIFT;
+ // align to page
+ info->size = info->stride * info->height;
+ page_num = (info->size + PAGE_SIZE - 1) >> PAGE_SHIFT;
if (info->size == 0) {
gvt_vgpu_err("fb size is zero\n");
return -EINVAL;
@@ -275,7 +278,7 @@ static int vgpu_get_plane_info(struct drm_device *dev,
gvt_vgpu_err("Not aligned fb address:0x%llx\n", info->start);
return -EFAULT;
}
- if (((info->start >> PAGE_SHIFT) + info->size) >
+ if (((info->start >> PAGE_SHIFT) + page_num) >
ggtt_total_entries(&dev_priv->ggtt)) {
gvt_vgpu_err("Invalid GTT offset or size\n");
return -EFAULT;
--
2.7.4
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