[PATCH v2 0/3] Enable both asynchronous and synchronous plane flip

[Zhenyu Wang]

On 2019.03.25 09:52:14 +0800, Colin Xu wrote:
> Write to GEN graphics display register PLANE_SURF is considered a plane flip,
> which can be done either through command streamer or MMIO write synchronously
> or asynchronously. Synchronous updates will update the plane surface values
> at the start of the next vertical blank to prevent screen tearing, while
> asynchronous updates will update the plane surface as soon as possible for
> faster screen update. The behaviour depends on MI_DISPLAY_FLIP command or
> plane control register.
> 
> There also exist some mistakes on emulating pipe frame count and pipe flip
> count increment:
> - pipe frame count should only get incremented on every start of vsync, not
>   on plane flip.
> - pipe flip count indicates the start of flip when the plane surface
>   address is updated, not when the flip completes.
> - On GVT currently supported platforms including BDW and SKL+, pipe flip
>   count only count flips of primary plane.
> Relevant information can be found on Intel GFX PRM on 01.org.
> 
> The patch set enables asynchronous plane flip for both MI_DISPLAY_FLIP
> update and plane surface address mmio update. With the patch, the render
> performance of some 3D application especially benchmark tools can be
> increased significantly. 
> An experiment tested on gvt-staging (5.0.0-RC4):
> Host: Intel CFL NUC (i7-8559U, 16GB memory)
> Guest: 2 VCPU, 4096MB memory, Type-4 VGPU, dmabuf
> Benchmark: 3DMark IceStorm on Windows 10.0.17134
> 
> +----------------+-----------+------------+
> |   Test Item    |  Before   |   After    |
> +----------------+-----------+------------+
> | Graphics score | 14346     | 55387      |
> | Graphic test 1 | 62.36 FPS | 252.65 FPS |
> | Graphic test 2 | 62.39 FPS | 230.04 FPS |
> | Physical score | 19688     | 26665      |
> | Physical test  | 62.50 FPS | 84.65 FPS  |
> +----------------+-----------+------------+
> 
> v2:
> Add bit operation definition for flip mode. (zhenyu)
> 
> Colin Xu (3):
>   drm/i915/gvt: Add macro define for mmio 0x50080 and gvt flip event
>   drm/i915/gvt: Enable synchronous flip on handling MI_DISPLAY_FLIP
>   drm/i915/gvt: Enable async flip on plane surface mmio writes
> 
>  drivers/gpu/drm/i915/gvt/cmd_parser.c | 10 +++-
>  drivers/gpu/drm/i915/gvt/display.c    |  1 -
>  drivers/gpu/drm/i915/gvt/handlers.c   | 73 ++++++++++++++++++++-------
>  drivers/gpu/drm/i915/gvt/reg.h        | 31 ++++++++++++
>  4 files changed, 94 insertions(+), 21 deletions(-)
> 

This series look fine to me.

Reviewed-by: Zhenyu Wang <zhenyuw at linux.intel.com>

-- 
Open Source Technology Center, Intel ltd.

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