[PATCH] drm/i915/gvt: Initialize intel_gvt_gtt_entry in stack

[Zhang, Tina]

I'm going to submit a patch-set which introduces set_ggtt_entry tracing point.
Form that patch-set, we can easily see why this patch is needed.

BR,
Tina

> -----Original Message-----
> From: Zhang, Tina
> Sent: Thursday, May 16, 2019 6:17 PM
> To: zhenyuw at linux.intel.com
> Cc: Zhang, Tina <tina.zhang at intel.com>; intel-gvt-dev at lists.freedesktop.org
> Subject: [PATCH] drm/i915/gvt: Initialize intel_gvt_gtt_entry in stack
> 
> In stack, intel_gvt_gtt_entry values need to be initialized before being used.
> 
> Signed-off-by: Tina Zhang <tina.zhang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/gtt.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index c2f7d20..6df6e0b 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -2192,7 +2192,7 @@ static int emulate_ggtt_mmio_write(struct
> intel_vgpu *vgpu, unsigned int off,
>  	/* the VM may configure the whole GM space when ballooning is
> used */
>  	if (!vgpu_gmadr_is_valid(vgpu, gma))
>  		return 0;
> -
> +	e.val64 = 0;
>  	e.type = GTT_TYPE_GGTT_PTE;
>  	memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data,
>  			bytes);
> @@ -2245,7 +2245,8 @@ static int emulate_ggtt_mmio_write(struct
> intel_vgpu *vgpu, unsigned int off,
> 
>  	if (!partial_update && (ops->test_present(&e))) {
>  		gfn = ops->get_pfn(&e);
> -		m = e;
> +		m.val64 = e.val64;
> +		m.type = e.type;
> 
>  		/* one PTE update may be issued in multiple writes and the
>  		 * first write may not construct a valid gfn @@ -2267,6
> +2268,8 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
> unsigned int off,
>  		} else
>  			ops->set_pfn(&m, dma_addr >> PAGE_SHIFT);
>  	} else {
> +		m.val64 = 0;
> +		m.type = GTT_TYPE_GGTT_PTE;
>  		ops->set_pfn(&m, gvt->gtt.scratch_mfn);
>  		ops->clear_present(&m);
>  	}
> --
> 2.7.4