[PATCH] drm/i915/gvt: Fix GFX_MODE handling

[Zhenyu Wang]

On 2019.05.23 15:46:37 +0800, Colin Xu wrote:
> Enter failsafe if vgpu tries to change GFX_MODE controlled by host.
> 
> Signed-off-by: Colin Xu<colin.xu at intel.com>
> ---

Reviewed-by: Zhenyu Wang <zhenyuw at linux.intel.com>

>  drivers/gpu/drm/i915/gvt/handlers.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index b4fc7f95cbe1..edb1416585f5 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -1692,8 +1692,22 @@ static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
>  	bool enable_execlist;
>  	int ret;
> +	(*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(1);
> +	if (IS_COFFEELAKE(vgpu->gvt->dev_priv))
> +		(*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(2);
>  	write_vreg(vgpu, offset, p_data, bytes);
> +	if (data & _MASKED_BIT_ENABLE(1)) {
> +		enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
> +		return 0;
> +	}
> +
> +	if (IS_COFFEELAKE(vgpu->gvt->dev_priv) &&
> +	    data & _MASKED_BIT_ENABLE(2)) {
> +		enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
> +		return 0;
> +	}
> +
>  	/* when PPGTT mode enabled, we will check if guest has called
>  	 * pvinfo, if not, we will treat this guest as non-gvtg-aware
>  	 * guest, and stop emulating its cfg space, mmio, gtt, etc.
> 
> -- 
> 2.21.0
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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