[PATCH V3] drm/i915/gvt: save RING_HEAD into vreg when vgpu switched out

[Zhenyu Wang]

On 2019.05.23 09:21:41 +0800, Xiaolin Zhang wrote:
> to save RING_HEAD into vgpu reg when vgpu switched out and report
> it's value back to guest.
> 
> v3: save RING HEAD/TAIL vgpu reg in save_ring_hw_state. (Zhenyu Wang)
> v2: save RING_TAIL as well during vgpu mmio switch to meet ring_is_idle
> condition. (Fred Gao)
> v1: based on input from Weinan. (Weinan Li)
> 
> Fixes: 519a019491b8 ("drm/i915/hangcheck: Replace hangcheck.seqno with RING_HEAD")
> 
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/scheduler.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
> index 38897d2..353b4d0 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@ -218,6 +218,10 @@ static void save_ring_hw_state(struct intel_vgpu *vgpu, int ring_id)
>  	vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
>  	reg = RING_ACTHD_UDW(ring_base);
>  	vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
> +	reg = RING_HEAD(ring_base);
> +	vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
> +	reg = RING_TAIL(ring_base);
> +	vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
>  }

Yan reminded me that we don't actually align guest vs. host ring
buffer, so they don't have same head/tail, this directly updates guest
value with host value is not correct. Although it might work around
current hang check issue for processed head, we should keep guest ring
correctly with its vreg value. Could you update this?

thanks

-- 
Open Source Technology Center, Intel ltd.

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