[PATCH v1] drm/i915/gvt: Fix guest boot warning

Gao, Fred fred.gao at intel.com
Wed Nov 27 08:51:49 UTC 2019


Thanks, comments in line.

-----Original Message-----
From: Zhenyu Wang <zhenyuw at linux.intel.com> 
Sent: 2019年11月27日 12:53
To: Gao, Fred <fred.gao at intel.com>
Cc: intel-gvt-dev at lists.freedesktop.org
Subject: Re: [PATCH v1] drm/i915/gvt: Fix guest boot warning

On 2019.11.27 00:19:04 +0800, Gao, Fred wrote:
> Simulate MIA core in reset status once GUC engine is reset.
> 
> Signed-off-by: Gao Fred <fred.gao at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c 
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index 3de664deb2f8..78f4d41b9005 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -341,6 +341,11 @@ static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
>  			gvt_dbg_mmio("vgpu%d: request VCS2 Reset\n", vgpu->id);
>  			engine_mask |= BIT(VCS1);
>  		}
> +		if (data & GEN9_GRDOM_GUC) {
> +			gvt_dbg_mmio("vgpu%d: request GUC Reset\n", vgpu->id);
> +			vgpu_vreg(vgpu, i915_mmio_reg_offset(GUC_STATUS))
> +				|= GS_MIA_IN_RESET;
> +		}

Can write as vgpu_vreg_t(vgpu, GUC_STATUS) = ...
[fred] ok
Looks we can do this better in GUC_STATUS handler that we can clear IN_RESET value after reading.
[Fred] since the value is always 1 after guc_reset in native i915, so I do not do the change as well.
(0x0000c000): 0x00000001

>  		engine_mask &= INTEL_INFO(vgpu->gvt->dev_priv)->engine_mask;
>  	}
>  
> --
> 2.17.1
> 
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