[PATCH] drm/i915/gvt: add support to command SWTESS_BASE_ADDRESS

[Zhenyu Wang]

On 2020.03.05 00:54:13 -0500, Yan Zhao wrote:
> This cmd access is found on BDW.
> 
> Signed-off-by: Yan Zhao <yan.y.zhao at intel.com>

Acked-by: Zhenyu Wang <zhenyuw at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index 151fea215e5c..e046878bd4d3 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -164,6 +164,7 @@ struct decode_info {
>  #define OP_STATE_BASE_ADDRESS                   OP_3D_MEDIA(0x0, 0x1, 0x01)
>  #define OP_STATE_SIP                            OP_3D_MEDIA(0x0, 0x1, 0x02)
>  #define OP_3D_MEDIA_0_1_4			OP_3D_MEDIA(0x0, 0x1, 0x04)
> +#define OP_SWTESS_BASE_ADDRESS			OP_3D_MEDIA(0x0, 0x1, 0x03)
>  
>  #define OP_3DSTATE_VF_STATISTICS_GM45           OP_3D_MEDIA(0x1, 0x0, 0x0B)
>  
> @@ -2468,6 +2469,9 @@ static const struct cmd_info cmd_info[] = {
>  	{"OP_3D_MEDIA_0_1_4", OP_3D_MEDIA_0_1_4, F_LEN_VAR, R_RCS, D_ALL,
>  		ADDR_FIX_1(1), 8, NULL},
>  
> +	{"OP_SWTESS_BASE_ADDRESS", OP_SWTESS_BASE_ADDRESS,
> +		F_LEN_VAR, R_RCS, D_ALL, ADDR_FIX_2(1, 2), 3, NULL},
> +
>  	{"3DSTATE_VS", OP_3DSTATE_VS, F_LEN_VAR, R_RCS, D_ALL, 0, 8, NULL},
>  
>  	{"3DSTATE_SF", OP_3DSTATE_SF, F_LEN_VAR, R_RCS, D_ALL, 0, 8, NULL},
> -- 
> 2.17.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Open Source Technology Center, Intel ltd.

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