[PATCH] i915/gvt: Set ENHANCED_FRAME_CAP bit
Zhenyu Wang
zhenyuw at linux.intel.com
Thu Nov 12 06:39:04 UTC 2020
On 2020.09.21 02:58:07 -0400, Tina Zhang wrote:
> Specification says the bit7 of the DPCD MAX_LANE_COUNT (offset 0x02) must
> be set to 1 when comes to the displayport version 1.2. This patch respects
> the definition.
>
> W/o this patch, guest i915 driver can only set the resolution to 1024*768,
> and complains about the unsuccessful link training:
>
> [ 5.692193] i915 0000:00:02.0: [drm] *ERROR* index 0, lane_count 1 Link Training Unsuccessful
>
> Signed-off-by: Tina Zhang <tina.zhang at intel.com>
> ---
> drivers/gpu/drm/i915/gvt/display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 7ba16ddfe75f..d7898e87791f 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -164,7 +164,7 @@ static unsigned char virtual_dp_monitor_edid[GVT_EDID_NUM][EDID_SIZE] = {
>
> /* let the virtual display supports DP1.2 */
> static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = {
> - 0x12, 0x014, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + 0x12, 0x014, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> };
>
> static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
> --
OK, looks this follows spec for DPCD 1.2 requirement. Btw, pls write proper component as
drm/i915/gvt in title next time.
Reviewed-by: Zhenyu Wang <zhenyuw at linux.intel.com>
Thanks!
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