[PATCH] drm/i915/gvt: Fix mmio handler break on BXT/APL.

[Zhenyu Wang]

On 2020.10.12 12:51:40 +0800, Colin Xu wrote:
> - Remove dup mmio handler for BXT/APL.
> - Add more with F_CMD_ACCESS.
> 
> Signed-off-by: Colin Xu <colin.xu at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 809429a35ec2..9891501da064 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -3140,7 +3140,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>  		 NULL, NULL);
>  
>  	MMIO_DFH(GAMT_CHKN_BIT_REG, D_KBL | D_CFL, F_CMD_ACCESS, NULL, NULL);
> -	MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS);
> +	MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS & ~D_BXT);
>  
>  	return 0;
>  }
> @@ -3314,6 +3314,12 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
>  	MMIO_D(GEN8_PUSHBUS_SHIFT, D_BXT);
>  	MMIO_D(GEN6_GFXPAUSE, D_BXT);
>  	MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);
> +	MMIO_DFH(GEN8_L3CNTLREG, D_BXT, F_CMD_ACCESS, NULL, NULL);
> +	MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL);
> +	MMIO_F(_MMIO(0x2658), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
> +	MMIO_F(_MMIO(0x12658), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
> +	MMIO_F(_MMIO(0x22658), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
> +	MMIO_F(_MMIO(0x2a658), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
>

Those should be GPR register with define in i915_reg.h, so pls use name for them.

And I'm not sure what's specific break this fixes? better elaborate or provide Fixes: tag.

>  	MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);
>  
> -- 
> 2.28.0
> 
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> intel-gvt-dev at lists.freedesktop.org
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