[PATCH v2] drm/i915/gvt: Fix mmio handler break on BXT/APL.

[Colin Xu]

On 2020-10-16 12:16, Zhenyu Wang wrote:
> On 2020.10.14 09:18:16 +0800, Colin Xu wrote:
>> - Remove dup mmio handler for BXT/APL. Otherwise mmio handler will fail
>>    to init.
>> - Add engine GPR with F_CMD_ACCESS since BXT/APL will load them via
>>    LRI. Otherwise, guest will enter failsafe mode.
>>
>> V2:
>> Use RCS/BCS GPR macros instead of offset.
>> Revise comment.
>>
>> Signed-off-by: Colin Xu <colin.xu at intel.com>
>> ---
>>   drivers/gpu/drm/i915/gvt/handlers.c | 8 +++++++-
>>   1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
>> index 0031e7c43ea8..2691ae841971 100644
>> --- a/drivers/gpu/drm/i915/gvt/handlers.c
>> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
>> @@ -3140,7 +3140,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
>>   		 NULL, NULL);
>>   
>>   	MMIO_DFH(GAMT_CHKN_BIT_REG, D_KBL | D_CFL, F_CMD_ACCESS, NULL, NULL);
>> -	MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS);
>> +	MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS & ~D_BXT);
>>   
>>   	return 0;
>>   }
>> @@ -3314,6 +3314,12 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
>>   	MMIO_D(GEN8_PUSHBUS_SHIFT, D_BXT);
>>   	MMIO_D(GEN6_GFXPAUSE, D_BXT);
>>   	MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL);
>> +	MMIO_DFH(GEN8_L3CNTLREG, D_BXT, F_CMD_ACCESS, NULL, NULL);
>> +	MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL);
>> +	MMIO_F(HSW_CS_GPR(0), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
>> +	MMIO_F(_MMIO(0x12600), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
>> +	MMIO_F(BCS_GPR(0), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
>> +	MMIO_F(_MMIO(0x2a600), 0x40, F_CMD_ACCESS, 0, 0, D_BXT, NULL, NULL);
> Should be like GEN8_RING_CS_GPR(RENDER_RING_BASE, 0), etc.
Emmm it's much better. Thanks!
>
>>   
>>   	MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL);
>>   
>> -- 
>> 2.28.0
>>
>> _______________________________________________
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>> intel-gvt-dev at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

-- 
Best Regards,
Colin Xu