[PATCH] drm/i915/gvt: Init vreg GUC_STATUS to GS_MIA_IN_RESET

[Zhenyu Wang]

On 2020.08.19 09:09:00 +0800, Colin Xu wrote:
> Although GVT doesnt' support guest GuC, MIA core is still expected
> to be GS_MIA_IN_RESET after uc HW reset.
> 
> Signed-off-by: Colin Xu <colin.xu at intel.com>
> ---

Reviewed-by: Zhenyu Wang <zhenyuw at linux.intel.com>

>  drivers/gpu/drm/i915/gvt/mmio.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
> index 291993615af9..b6811f6a230d 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio.c
> @@ -251,6 +251,9 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
>  		/* set the bit 0:2(Core C-State ) to C0 */
>  		vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0;
>  
> +		/* uc reset hw expect GS_MIA_IN_RESET */
> +		vgpu_vreg_t(vgpu, GUC_STATUS) |= GS_MIA_IN_RESET;
> +
>  		if (IS_BROXTON(vgpu->gvt->gt->i915)) {
>  			vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &=
>  				    ~(BIT(0) | BIT(1));
> -- 
> 2.28.0
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

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