[Intel-xe] [PATCH 5/6] drm/xe: Clarify GT counting logic
Matt Roper
matthew.d.roper at intel.com
Mon Apr 3 20:17:01 UTC 2023
The total number of GTs supported by a platform should be one primary
GT, one media GT (if media version >= 13), and a number of remote tile
GTs dependent on the graphics IP present. Express this more clearly in
the device setup.
Note that xe->info.tile_count is inaccurately named; the rest of the
driver treats this as the GT count, not just the tile count. This
will need to be cleaned up at some point down the road.
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
drivers/gpu/drm/xe/xe_pci.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 3e7e57254a6d..d634e781858a 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -46,12 +46,13 @@ struct xe_graphics_desc {
u8 rel;
u8 dma_mask_size; /* available DMA address bits */
- u8 max_tiles; /* defaults to 1 if unset */
u8 vm_max_level;
u8 vram_flags;
u64 hw_engine_mask; /* hardware engines provided by graphics IP */
+ u8 max_remote_tiles:2;
+
u8 has_asid:1;
u8 has_flat_ccs:1;
u8 has_link_copy_engine:1;
@@ -152,7 +153,7 @@ static const struct xe_graphics_desc graphics_xehpc = {
XE_HP_FEATURES,
.dma_mask_size = 52,
- .max_tiles = 2,
+ .max_remote_tiles = 1,
.vm_max_level = 4,
.vram_flags = XE_VRAM_FLAGS_NEED64K,
@@ -171,8 +172,6 @@ static const struct xe_graphics_desc graphics_xelpg = {
BIT(XE_HW_ENGINE_CCS0),
XE_HP_FEATURES,
- .max_tiles = 2,
-
.has_flat_ccs = 0,
};
@@ -455,7 +454,6 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
xe->info.platform = desc->platform;
xe->info.dma_mask_size = desc->graphics->dma_mask_size;
xe->info.vram_flags = desc->graphics->vram_flags;
- xe->info.tile_count = desc->graphics->max_tiles ?: 1;
xe->info.vm_max_level = desc->graphics->vm_max_level;
xe->info.supports_usm = desc->graphics->supports_usm;
xe->info.has_asid = desc->graphics->has_asid;
@@ -464,6 +462,19 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
xe->info.has_range_tlb_invalidation = desc->graphics->has_range_tlb_invalidation;
xe->info.has_link_copy_engine = desc->graphics->has_link_copy_engine;
+ /*
+ * All platforms have at least one primary GT. Any platform with media
+ * version 13 or higher has an additional dedicated media GT. And
+ * depending on the graphics IP there may be additional "remote tiles."
+ * All of these together determine the overall GT count.
+ *
+ * FIXME: 'tile_count' here is misnamed since the rest of the driver
+ * treats it as the number of GTs rather than just the number of tiles.
+ */
+ xe->info.tile_count = 1 + desc->graphics->max_remote_tiles;
+ if (MEDIA_VER(xe) >= 13)
+ xe->info.tile_count++;
+
spd = subplatform_get(xe, desc);
xe->info.subplatform = spd ? spd->subplatform : XE_SUBPLATFORM_NONE;
xe->info.step = xe_step_get(xe);
--
2.39.2
More information about the Intel-xe
mailing list