[Intel-xe] [PATCH 1/2] drm/xe: Add Rocketlake device info

[Lucas De Marchi]

On Wed, Apr 05, 2023 at 01:35:32PM -0700, Anusha Srivatsa wrote:
>Add missing device info for Rocketlake.
>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>---
> drivers/gpu/drm/xe/xe_display.c | 10 ++++++++++
> drivers/gpu/drm/xe/xe_pci.c     |  9 +++++++++
> 2 files changed, 19 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_display.c b/drivers/gpu/drm/xe/xe_display.c
>index 5fab5b9fbde0..93da1c4757aa 100644
>--- a/drivers/gpu/drm/xe/xe_display.c
>+++ b/drivers/gpu/drm/xe/xe_display.c
>@@ -488,6 +488,16 @@ void xe_display_info_init(struct xe_device *xe)
> 	case XE_DG1:
> 		xe->info.display = (struct xe_device_display_info) { GEN12_DISPLAY };
> 		break;
>+	case XE_ROCKETLAKE:
>+		xe->info.display = (struct xe_device_display_info) {

in i915 we have:

	.display.abox_mask = BIT(0)
	.display.has_hti = 1,
	.display.has_psr_hw_tracking = 0,

It seems we are missing the abox_mask setting here?

Since we already have the RKL platform definition, it's better to invert
the patches and first add the guc/huc entries and later add this patch.


other than the abox_mask,
	
	Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi




>+			GEN12_DISPLAY,
>+			.has_hti = 1,
>+			.has_psr_hw_tracking = 0,
>+			.cpu_transcoder_mask =
>+				BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
>+				BIT(TRANSCODER_C),
>+		};
>+		break;
> 	case XE_ALDERLAKE_S:
> 		xe->info.display = (struct xe_device_display_info) {
> 			GEN12_DISPLAY,
>diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>index 20be113544fa..9fcaf2255a28 100644
>--- a/drivers/gpu/drm/xe/xe_pci.c
>+++ b/drivers/gpu/drm/xe/xe_pci.c
>@@ -103,6 +103,14 @@ static const struct xe_device_desc tgl_desc = {
> 		BIT(XE_HW_ENGINE_VCS2),
> };
>
>+static const struct xe_device_desc rkl_desc = {
>+	GEN12_FEATURES,
>+	PLATFORM(XE_ROCKETLAKE),
>+	.platform_engine_mask =
>+		BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
>+		BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0),
>+};
>+
> static const struct xe_device_desc adl_s_desc = {
> 	GEN12_FEATURES,
> 	PLATFORM(XE_ALDERLAKE_S),
>@@ -286,6 +294,7 @@ __diag_pop();
>  */
> static const struct pci_device_id pciidlist[] = {
> 	XE_TGL_IDS(INTEL_VGA_DEVICE, &tgl_desc),
>+	XE_RKL_IDS(INTEL_VGA_DEVICE, &rkl_desc),
> 	XE_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc),
> 	XE_ADLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc),
> 	XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc),
>-- 
>2.25.1
>