[Intel-xe] [PATCH 24/41] fixup! drm/i915/display: Remaining changes to make xe compile

[Jani Nikula]

No longer needed.

Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index f451b8b1d1a6..2fd0630b26fb 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -474,7 +474,6 @@ static void hsw_get_cdclk(struct drm_i915_private *dev_priv,
 		cdclk_config->cdclk = 540000;
 }
 
-#ifdef I915
 static int vlv_calc_cdclk(struct drm_i915_private *dev_priv, int min_cdclk)
 {
 	int freq_320 = (dev_priv->hpll_freq <<  1) % 320000 != 0 ?
@@ -713,7 +712,6 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
 
 	intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
 }
-#endif
 
 static int bdw_calc_cdclk(int min_cdclk)
 {
@@ -2608,7 +2606,6 @@ static int bxt_compute_min_voltage_level(struct intel_cdclk_state *cdclk_state)
 	return min_voltage_level;
 }
 
-#ifdef I915
 static int vlv_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
 {
 	struct intel_atomic_state *state = cdclk_state->base.state;
@@ -2637,7 +2634,6 @@ static int vlv_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
 
 	return 0;
 }
-#endif
 
 static int bdw_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
 {
@@ -3140,14 +3136,12 @@ static int pch_rawclk(struct drm_i915_private *dev_priv)
 	return (intel_de_read(dev_priv, PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK) * 1000;
 }
 
-#ifdef I915
 static int vlv_hrawclk(struct drm_i915_private *dev_priv)
 {
 	/* RAWCLK_FREQ_VLV register updated from power well code */
 	return vlv_get_cck_clock_hpll(dev_priv, "hrawclk",
 				      CCK_DISPLAY_REF_CLOCK_CONTROL);
 }
-#endif
 
 static int i9xx_hrawclk(struct drm_i915_private *dev_priv)
 {
@@ -3229,10 +3223,8 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv)
 		freq = cnp_rawclk(dev_priv);
 	else if (HAS_PCH_SPLIT(dev_priv))
 		freq = pch_rawclk(dev_priv);
-#ifdef I915
 	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		freq = vlv_hrawclk(dev_priv);
-#endif
 	else if (DISPLAY_VER(dev_priv) >= 3)
 		freq = i9xx_hrawclk(dev_priv);
 	else
@@ -3289,7 +3281,6 @@ static const struct intel_cdclk_funcs bdw_cdclk_funcs = {
 	.modeset_calc_cdclk = bdw_modeset_calc_cdclk,
 };
 
-#ifdef I915
 static const struct intel_cdclk_funcs chv_cdclk_funcs = {
 	.get_cdclk = vlv_get_cdclk,
 	.set_cdclk = chv_set_cdclk,
@@ -3301,7 +3292,6 @@ static const struct intel_cdclk_funcs vlv_cdclk_funcs = {
 	.set_cdclk = vlv_set_cdclk,
 	.modeset_calc_cdclk = vlv_modeset_calc_cdclk,
 };
-#endif
 
 static const struct intel_cdclk_funcs hsw_cdclk_funcs = {
 	.get_cdclk = hsw_get_cdclk,
@@ -3425,12 +3415,10 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
 		dev_priv->display.funcs.cdclk = &bdw_cdclk_funcs;
 	} else if (IS_HASWELL(dev_priv)) {
 		dev_priv->display.funcs.cdclk = &hsw_cdclk_funcs;
-#ifdef I915
 	} else if (IS_CHERRYVIEW(dev_priv)) {
 		dev_priv->display.funcs.cdclk = &chv_cdclk_funcs;
 	} else if (IS_VALLEYVIEW(dev_priv)) {
 		dev_priv->display.funcs.cdclk = &vlv_cdclk_funcs;
-#endif
 	} else if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv)) {
 		dev_priv->display.funcs.cdclk = &fixed_400mhz_cdclk_funcs;
 	} else if (IS_IRONLAKE(dev_priv)) {
-- 
2.39.2