[Intel-xe] [PATCH] drm/xe/: add gt tuning for indirect state

Lucas De Marchi lucas.demarchi at intel.com
Fri Apr 14 22:11:44 UTC 2023


On Fri, Apr 14, 2023 at 02:59:55PM -0700, Lucas De Marchi wrote:
>On Fri, Apr 14, 2023 at 12:33:55PM -0700, Matt Atwood wrote:
>>Force indirect state sampler data to only be in the dynamic state pool,
>>which is more convienent for UMD. Behavior change mirrors windows
>>behavior.
>
>Better than the last sentence would be something like:
>
>Behavior change mirrors similar change for i915 in commit 16fc9c08f0ec
>("drm/i915: disable sampler indirect state in bindless heap").
>
>
>BSpec: 46052
>
>>
>>Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
>>---
>>drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
>>drivers/gpu/drm/xe/xe_tuning.c       | 5 +++++
>>2 files changed, 6 insertions(+)
>>
>>diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>index f174758d8307..b7324aede6b6 100644
>>--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>@@ -286,6 +286,7 @@
>>#define   ENABLE_SMALLPL			REG_BIT(15)
>>#define   SC_DISABLE_POWER_OPTIMIZATION_EBB	REG_BIT(9)
>>#define   GEN11_SAMPLER_ENABLE_HEADLESS_MSG	REG_BIT(5)
>>+#define   INDIRECT_STATE_BASE_ADDR_OVERRIDE	REG_BIT(0)
>>
>>#define GEN9_HALF_SLICE_CHICKEN7		MCR_REG(0xe194)
>>#define   DG2_DISABLE_ROUND_ENABLE_ALLOW_FOR_SSLA	REG_BIT(15)
>>diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
>>index 27cf1330facd..5abef45a10fc 100644
>>--- a/drivers/gpu/drm/xe/xe_tuning.c
>>+++ b/drivers/gpu/drm/xe/xe_tuning.c
>>@@ -26,6 +26,11 @@ static const struct xe_rtp_entry gt_tunings[] = {
>>	  XE_RTP_RULES(PLATFORM(DG2)),
>>	  XE_RTP_ACTIONS(SET(XEHP_SQCM, EN_32B_ACCESS))
>>	},
>>+	{ XE_RTP_NAME("Tuning: Set Indirect State Override"),
>>+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, -1)),
>
>as noted by José, since we have that define let's use it:
>XE_RTP_END_VERSION_UNDEFINED
>
>with those changes:
>	
>	Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

taking that back, sorry. Just noticed this setting needs to be
re-applied on engine reset, so gt_tunings is not the right place.
Please add 

1) engine_tunings[] array
2) xe_tuning_process_engine (to be called everywhere
xe_wa_process_engine() is called.

This can be done as a preparatory commit so we don't mix the addition of
this workaround with the additional infra.

3) Make sure to add FUNC(xe_rtp_match_first_render_or_compute) to the
the rtp rules

Lucas De Marchi

>
>Lucas De Marchi
>
>>+	  XE_RTP_ACTIONS(SET(GEN10_SAMPLER_MODE, INDIRECT_STATE_BASE_ADDR_OVERRIDE,
>>+			     XE_RTP_ACTION_FLAG(MASKED_REG)))
>>+	},
>>	{}
>>};
>>
>>-- 
>>2.39.2
>>


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