[Intel-xe] [RFC] drm/xe: Introduce xe_ASSERT macros

Matthew Brost matthew.brost at intel.com
Fri Aug 4 03:58:26 UTC 2023


On Fri, Jul 28, 2023 at 09:25:18PM +0200, Michal Wajdeczko wrote:
> As we are moving away from the controversial XE_BUG_ON macro,
> relying just on WARN_ON or drm_err does not cover the cases
> where we want to annotate functions with additional detailed
> debug checks to assert that all prerequisites are satisfied,
> without paying footprint or performance penalty on non-debug
> builds, where all misuses introduced during code integration
> were already fixed.
> 
> Introduce family of xe_ASSERT macros that try to follow classic
> assert() utility and can be compiled out on non-debug builds.
> 
> Macros are based on drm_WARN, but unlikely to origin, disallow
> use in expressions since we will compile that code out.
> 
> As we are operating on the xe pointers, we can print additional
> information about the device, like tile or GT identifier, that
> is not available from generic WARN report:
> 
> [ ] xe 0000:00:02.0: [drm] Assertion `false` failed!
>     graphics: Xe_LP 12.0 media: Xe_M 12.0 GT0
> [ ] WARNING: CPU: 4 PID: 8442 at drivers/gpu/drm/xe/xe_device.c:280 xe_device_probe+0x2f5/0x4a0 [xe]
> [ ] RIP: 0010:xe_device_probe+0x2f5/0x4a0 [xe]
> 

So we get the entire stack trace?

Agree with idea, my vote is introduce these and audit the code replacing
a of the WARN_ON with these.

Matt

> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Francois Dugast <francois.dugast at intel.com>
> Cc: Matthew Brost <matthew.brost at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_assert.h | 47 ++++++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/xe_assert.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h
> new file mode 100644
> index 000000000000..65306768d637
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_assert.h
> @@ -0,0 +1,47 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef __XE_ASSERT_H__
> +#define __XE_ASSERT_H__
> +
> +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> +
> +#define xe_ASSERT_MSG(xe, condition, fmt, arg...) ({						\
> +	struct xe_device *__xe = (xe);								\
> +	int __passed = !!(condition);								\
> +	drm_WARN(&__xe->drm, !__passed, "[" DRM_NAME "] Assertion `%s` failed!\n"		\
> +		 "graphics: %s %u.%u media: %s %u.%u " fmt,					\
> +		 __stringify(condition),							\
> +		 __xe->info.graphics_name,							\
> +		 __xe->info.graphics_verx100 / 100, __xe->info.graphics_verx100 % 100,		\
> +		 __xe->info.media_name,								\
> +		 __xe->info.media_verx100 / 100, __xe->info.media_verx100 % 100,		\
> +		 ## arg);									\
> +	(void)(__passed);									\
> +})
> +
> +#else
> +
> +#define xe_ASSERT_MSG(xe, condition, fmt, arg...) ({						\
> +	typecheck(struct xe_device *, xe);							\
> +	BUILD_BUG_ON_INVALID(condition);							\
> +})
> +
> +#endif
> +
> +#define xe_ASSERT(xe, condition) \
> +	xe_ASSERT_MSG((xe), condition, "")
> +
> +#define xe_tile_ASSERT(tile, condition) ({							\
> +	struct xe_tile *__tile = (tile);							\
> +	xe_ASSERT_MSG(tile_to_xe(__tile), condition, "tile%u ", __tile->id);			\
> +})
> +
> +#define xe_gt_ASSERT(gt, condition) ({								\
> +	struct xe_gt *__gt = (gt);								\
> +	xe_ASSERT_MSG(gt_to_xe(__gt), condition, "GT%u ", __gt->info.id);			\
> +})
> +
> +#endif /* __XE_ASSERT_H__ */
> -- 
> 2.25.1
> 


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