[Intel-xe] [PATCH 5/6] drm/xe: GSC forcewake support
Matt Roper
matthew.d.roper at intel.com
Wed Aug 16 23:09:58 UTC 2023
On Wed, Aug 16, 2023 at 11:04:24AM -0700, Daniele Ceraolo Spurio wrote:
> The ID for the GSC forcewake domain already exists, but we're missing
> the register definitions and the domain intialization, so add that in.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 ++
> drivers/gpu/drm/xe/xe_force_wake.c | 7 +++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index e3d1cec7ba8d..d8f00e84b41a 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -33,6 +33,7 @@
> #define FORCEWAKE_ACK_MEDIA_VDBOX(n) XE_REG(0xd50 + (n) * 4)
> #define FORCEWAKE_ACK_MEDIA_VEBOX(n) XE_REG(0xd70 + (n) * 4)
> #define FORCEWAKE_ACK_RENDER XE_REG(0xd84)
> +#define FORCEWAKE_ACK_GSC XE_REG(0xdf8)
Even though it's logically similar to the other registers here, I think
we should still keep the register definitions sorted by offset (i.e.,
this register shouldn't be before GMD_ID's 0xd8c below). If we try to
bend the sorting rules to keep similar registers together, then people
keep bending them more and more over time and eventually it turns into
chaos.
Aside from the placement of the definition, the other changes here look
good, so
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
with that change.
Matt
>
> #define GMD_ID XE_REG(0xd8c)
> #define GMD_ID_ARCH_MASK REG_GENMASK(31, 22)
> @@ -259,6 +260,7 @@
> #define FORCEWAKE_RENDER XE_REG(0xa278)
> #define FORCEWAKE_MEDIA_VDBOX(n) XE_REG(0xa540 + (n) * 4)
> #define FORCEWAKE_MEDIA_VEBOX(n) XE_REG(0xa560 + (n) * 4)
> +#define FORCEWAKE_GSC XE_REG(0xa618)
>
> #define XEHPC_LNCFMISCCFGREG0 XE_REG_MCR(0xb01c, XE_REG_OPTION_MASKED)
> #define XEHPC_OVRLSCCC REG_BIT(0)
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index e563de862581..ef7279e0b006 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -97,6 +97,13 @@ void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> FORCEWAKE_ACK_MEDIA_VEBOX(j),
> BIT(0), BIT(16));
> }
> +
> + if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0))
> + domain_init(&fw->domains[XE_FW_DOMAIN_ID_GSC],
> + XE_FW_DOMAIN_ID_GSC,
> + FORCEWAKE_GSC,
> + FORCEWAKE_ACK_GSC,
> + BIT(0), BIT(16));
> }
>
> static void domain_wake(struct xe_gt *gt, struct xe_force_wake_domain *domain)
> --
> 2.41.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
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