[Intel-xe] [PATCH] drm/xe: enable idle msg and set hysteresis for GSCCS

Matt Roper matthew.d.roper at intel.com
Thu Aug 17 22:23:17 UTC 2023


On Thu, Aug 17, 2023 at 03:17:07PM -0700, Daniele Ceraolo Spurio wrote:
> On MTL (and only on MTL) the GSCCS defaults with idle messaging
> disabled. This means that, once awoken, the GSCCS will never signal its
> idleness to the GT. To allow the GT to enter the proper low-power state,
> we need therefore to turn idle messaging on. As part of this, we also
> need to set a proper hysteresis value for the engine.
> 
> v2: use MEDIA_VERSION() and CLR() for the RTP rule and action, add reg
> bit define in descending order (Matt)
> 
> Bspec: 71496
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |  4 ++++
>  drivers/gpu/drm/xe/xe_hw_engine.c        | 16 ++++++++++++++++
>  2 files changed, 20 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 79873bf64e8d..d57fd855086a 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -24,6 +24,10 @@
>  #define RING_PSMI_CTL(base)			XE_REG((base) + 0x50, XE_REG_OPTION_MASKED)
>  #define   RC_SEMA_IDLE_MSG_DISABLE		REG_BIT(12)
>  #define   WAIT_FOR_EVENT_POWER_DOWN_DISABLE	REG_BIT(7)
> +#define   IDLE_MSG_DISABLE			REG_BIT(0)
> +
> +#define RING_PWRCTX_MAXCNT(base)		XE_REG((base) + 0x54)
> +#define   IDLE_WAIT_TIME			REG_GENMASK(19, 0)
>  
>  #define RING_ACTHD_UDW(base)			XE_REG((base) + 0x5c)
>  #define RING_DMA_FADD_UDW(base)			XE_REG((base) + 0x60)
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 81281e9c02eb..24b5226f1433 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -339,6 +339,22 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe)
>  					   ring_cmd_cctl_val,
>  					   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>  		},
> +		/*
> +		 * To allow the GSC engine to go idle on MTL we need to enable
> +		 * idle messaging and set the hysteresis value (we use 0xA=5us
> +		 * as recommended in spec). On platforms after MTL this is
> +		 * enabled by default.
> +		 */
> +		{ XE_RTP_NAME("MTL GSCCS IDLE MSG enable"),
> +		  XE_RTP_RULES(MEDIA_VERSION(1300), ENGINE_CLASS(OTHER)),
> +		  XE_RTP_ACTIONS(CLR(RING_PSMI_CTL(0),
> +				     IDLE_MSG_DISABLE,
> +				     XE_RTP_ACTION_FLAG(ENGINE_BASE)),
> +				 FIELD_SET(RING_PWRCTX_MAXCNT(0),
> +					   IDLE_WAIT_TIME,
> +					   0xA,
> +					   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> +		},
>  		{}
>  	};
>  
> -- 
> 2.41.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


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