[Intel-xe] [Intel-gfx] [PATCH 27/42] drm/i915/xe2lpd: Read pin assignment from IOM

[Coelho, Luciano]

On Wed, 2023-08-23 at 10:07 -0700, Lucas De Marchi wrote:
> From: Luca Coelho <luciano.coelho at intel.com>
> 
> Starting from display version 20, we need to read the pin assignment
> from the IOM TCSS_DDI_STATUS register instead of reading it from the
> FIA.
> 
> We use the pin assignment to decide the maximum lane count.  So, to
> support this change, add a new lnl_tc_port_get_max_lane_count() function
> that reads from the TCSS_DDI_STATUS register and decides the maximum
> lane count based on that.
> 
> BSpec: 69594
> Cc: Mika Kahola <mika.kahola at intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---

Lucas, do you want me to send this together with my patchset with the
preparation for this?

In a way, the 4 patches I sent out can be applied independently of LNL-
related changes, so maybe I could resend just those 4 patches and you
base your entire series on top of my patches after they get applied?
Then this patch, which is really related to LNL could be part of your
series...

Let me know what you prefer.

--
Cheers,
Luca.