[Intel-xe] [PATCH v3 2/3] drm/xe/pvc: Force even num engines to use 64B

[Matt Roper]

On Wed, Aug 23, 2023 at 04:40:39AM -0700, Niranjana Vishwanathapura wrote:
> Wa_16017236439 requires that we update BCS_SWCTRL
> (via indirect context batch buffer) to set 64B
> transfers when running on an even-numbered BCS
> engine and 256B on an odd-numbered BCS engine.
> 
> v2: Move WA from engine_was[] to lrc_was[]
> 
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |  1 +
>  drivers/gpu/drm/xe/xe_wa.c               | 10 ++++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 1a366d8070f3..806755f31241 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -64,6 +64,7 @@
>  #define RING_BBADDR_UDW(base)			XE_REG((base) + 0x168)
>  
>  #define BCS_SWCTRL(base)			XE_REG((base) + 0x200, XE_REG_OPTION_MASKED)
> +#define BCS_SWCTRL_DISABLE_256B			REG_BIT(2)

Minor nitpick:  we usually add two extra spaces before the name of
register fields to make them stand out from the register names.

Aside from that,

        Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

>  
>  /* Handling MOCS value in BLIT_CCTL like it was done CMD_CCTL */
>  #define BLIT_CCTL(base)				XE_REG((base) + 0x204)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index e2b6e17d7ec4..f45e9452ba0e 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -604,6 +604,16 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
>  	  XE_RTP_ACTIONS(SET(CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE))
>  	},
>  
> +	/* PVC */
> +
> +	{ XE_RTP_NAME("16017236439"),
> +	  XE_RTP_RULES(PLATFORM(PVC), ENGINE_CLASS(COPY),
> +		       FUNC(xe_rtp_match_even_instance)),
> +	  XE_RTP_ACTIONS(SET(BCS_SWCTRL(0),
> +			     BCS_SWCTRL_DISABLE_256B,
> +			     XE_RTP_ACTION_FLAG(ENGINE_BASE))),
> +	},
> +
>  	/* Xe_LPG */
>  	{ XE_RTP_NAME("18019271663"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1271)),
> -- 
> 2.21.0.rc0.32.g243a4c7e27
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation