[Intel-xe] [PATCH v3 1/3] drm/xe/pvc: Blacklist BCS_SWCTRL register

[Matt Roper]

On Wed, Aug 23, 2023 at 04:40:38AM -0700, Niranjana Vishwanathapura wrote:
> Wa_16017236439 requires the BCS_SWCTRL to be privileged.
> 
> v2: Define and use BCS_SWCTRL()
> 
> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 ++
>  drivers/gpu/drm/xe/xe_reg_whitelist.c    | 6 ++++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index d57fd855086a..1a366d8070f3 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -63,6 +63,8 @@
>  #define RING_BBADDR(base)			XE_REG((base) + 0x140)
>  #define RING_BBADDR_UDW(base)			XE_REG((base) + 0x168)
>  
> +#define BCS_SWCTRL(base)			XE_REG((base) + 0x200, XE_REG_OPTION_MASKED)
> +
>  /* Handling MOCS value in BLIT_CCTL like it was done CMD_CCTL */
>  #define BLIT_CCTL(base)				XE_REG((base) + 0x204)
>  #define   BLIT_CCTL_DST_MOCS_MASK		REG_GENMASK(14, 9)
> diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
> index e83781f9a516..e66ae1bdaf9c 100644
> --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
> +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
> @@ -50,6 +50,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
>  				   RING_FORCE_TO_NONPRIV_DENY |
>  				   RING_FORCE_TO_NONPRIV_RANGE_64))
>  	},
> +	{ XE_RTP_NAME("16017236439"),
> +	  XE_RTP_RULES(PLATFORM(PVC), ENGINE_CLASS(COPY)),
> +	  XE_RTP_ACTIONS(WHITELIST(BCS_SWCTRL(0),
> +				   RING_FORCE_TO_NONPRIV_DENY,
> +				   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> +	},
>  	{}
>  };
>  
> -- 
> 2.21.0.rc0.32.g243a4c7e27
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation