[Intel-xe] [PATCH v2 6/6] drm/xe/dsb: DSB implementation for xe

[Manna, Animesh]

> -----Original Message-----
> From: Shankar, Uma <uma.shankar at intel.com>
> Sent: Friday, December 1, 2023 2:17 PM
> To: Manna, Animesh <animesh.manna at intel.com>; intel-
> xe at lists.freedesktop.org
> Subject: RE: [Intel-xe] [PATCH v2 6/6] drm/xe/dsb: DSB implementation for
> xe
> 
> 
> 
> > -----Original Message-----
> > From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of
> > Animesh Manna
> > Sent: Thursday, November 30, 2023 12:44 PM
> > To: intel-xe at lists.freedesktop.org
> > Subject: [Intel-xe] [PATCH v2 6/6] drm/xe/dsb: DSB implementation for
> > xe
> >
> > Add xe specific DSB buffer handling methods.
> >
> > Signed-off-by: Animesh Manna <animesh.manna at intel.com>
> > ---
> >  drivers/gpu/drm/xe/Makefile                |  1 +
> >  drivers/gpu/drm/xe/display/xe_dsb_buffer.c | 70
> > ++++++++++++++++++++++
> >  2 files changed, 71 insertions(+)
> >  create mode 100644 drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> >
> > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> > index 666024f316f6..87f3fca0c0ee 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -166,6 +166,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> >  	display/xe_plane_initial.o \
> >  	display/xe_display_rps.o \
> >  	display/xe_display_misc.o \
> > +	display/xe_dsb_buffer.o \
> >  	display/intel_fbdev_fb.o \
> >  	display/ext/i915_irq.o \
> >  	display/ext/i915_utils.o
> > diff --git a/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> > b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> > new file mode 100644
> > index 000000000000..dc91eb425e0d
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> > @@ -0,0 +1,70 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright 2023, Intel Corporation.
> > + */
> > +
> > +#include "i915_drv.h"
> > +#include "i915_vma.h"
> > +#include "intel_display_types.h"
> > +#include "intel_dsb_buffer.h"
> > +#include "xe_bo.h"
> > +#include "xe_gt.h"
> > +
> > +u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf) {
> > +	return xe_bo_ggtt_addr(dsb_buf->vma->bo);
> > +}
> > +
> > +void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32
> > +idx,
> > +u32 val) {
> > +	iosys_map_wr(&dsb_buf->vma->bo->vmap, idx * 4, u32, val); }
> > +
> > +u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx) {
> > +	return iosys_map_rd(&dsb_buf->vma->bo->vmap, idx * 4, u32); }
> > +
> > +void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32
> > +idx,
> > +u32 val, size_t size) {
> > +	WARN_ON(idx > (dsb_buf->buf_size - size) /
> > +sizeof(*dsb_buf->cmd_buf));
> > +
> > +	iosys_map_memset(&dsb_buf->vma->bo->vmap, idx * 4, val, size); }
> > +
> > +bool intel_dsb_buffer_create(struct intel_crtc *crtc, struct
> > +intel_dsb_buffer *dsb_buf, size_t size) {
> > +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > +	struct drm_i915_gem_object *obj;
> > +	struct i915_vma *vma;
> > +
> > +	vma = kzalloc(sizeof(*vma), GFP_KERNEL);
> 
> Check for allocation success.
> 
> > +
> > +	obj = xe_bo_create_pin_map(i915, xe_device_get_root_tile(i915),
> > +				   NULL, PAGE_ALIGN(size),
> > +				   ttm_bo_type_kernel,
> > +
> > XE_BO_CREATE_VRAM_IF_DGFX(xe_device_get_root_tile(i915)) |
> > +				   XE_BO_CREATE_GGTT_BIT);
> > +	if (IS_ERR(obj)) {
> > +		kfree(dsb_buf->vma);
> > +		return false;
> > +	}
> > +
> > +	vma->bo = obj;
> > +	dsb_buf->vma = vma;
> > +	dsb_buf->buf_size = size;
> > +
> > +	return true;
> > +}
> > +
> > +void intel_dsb_buffer_cleanup(struct intel_dsb_buffer *dsb_buf) {
> > +	xe_bo_unpin_map_no_vm(dsb_buf->vma->bo);
> > +	kfree(dsb_buf->vma);
> > +}
> > +
> > +void intel_dsb_buffer_flush_map(struct intel_dsb_buffer *dsb_buf) {
> > +	/* TODO: add xe specific flush_map() for dsb buffer object. */ }
> 
> Create an internal task to track this cleanup and send out a follow up change.
> 
> With above addressed, Overall looks good to me.
> Reviewed-by: Uma Shankar <uma.shankar at intel.com>

Thanks for review, addressed review comments in v3.
Will create an internal task for TODO.

Regards,
Animesh

> 
> > --
> > 2.29.0