[Intel-xe] [PATCH] drm/xe: Apply mask to RING IMR

[Tejas Upadhyay]

As per bspec RING interrupt mask register will have
lower 16 bit masked by upper 16 bit.

Bspec 60352

Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
---
 drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 444ff9b83bb1..d9013c698710 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -39,7 +39,7 @@
 #define RING_MI_MODE(base)			XE_REG((base) + 0x9c)
 #define RING_NOPID(base)			XE_REG((base) + 0x94)
 
-#define RING_IMR(base)				XE_REG((base) + 0xa8)
+#define RING_IMR(base)				XE_REG((base) + 0xa8, XE_REG_OPTION_MASKED)
 #define   RING_MAX_NONPRIV_SLOTS  12
 
 #define RING_EIR(base)				XE_REG((base) + 0xb0)
-- 
2.25.1