[PATCH 16/17] drm/xe/oa: Add MMIO trigger support
Ashutosh Dixit
ashutosh.dixit at intel.com
Fri Dec 8 06:43:28 UTC 2023
Add MMIO trigger support and allow-list required registers for MMIO trigger
use case. Registers are whitelisted for the lifetime of the driver but MMIO
trigger is enabled only for the duration of the stream.
Bspec: 45925, 60340, 61228
Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
drivers/gpu/drm/xe/regs/xe_oa_regs.h | 7 ++++++
drivers/gpu/drm/xe/xe_oa.c | 34 ++++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_reg_whitelist.c | 23 ++++++++++++++++++
include/uapi/drm/xe_drm.h | 3 +++
4 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
index b66cd95b795e7..1ce27a72079ad 100644
--- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
@@ -64,16 +64,23 @@
#define OA_OACONTROL_COUNTER_SIZE_MASK REG_GENMASK(8, 8)
#define OAG_OA_DEBUG XE_REG(0xdaf8, XE_REG_OPTION_MASKED)
+#define OAG_OA_DEBUG_DISABLE_MMIO_TRG REG_BIT(14)
+#define OAG_OA_DEBUG_START_TRIGGER_SCOPE_CONTROL REG_BIT(13)
+#define OAG_OA_DEBUG_DISABLE_START_TRG_2_COUNT_QUAL REG_BIT(8)
+#define OAG_OA_DEBUG_DISABLE_START_TRG_1_COUNT_QUAL REG_BIT(7)
#define OAG_OA_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
#define OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
#define OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
#define OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
#define OAG_OASTATUS XE_REG(0xdafc)
+#define OAG_OASTATUS_MMIO_TRG_Q_FULL REG_BIT(6)
#define OAG_OASTATUS_COUNTER_OVERFLOW REG_BIT(2)
#define OAG_OASTATUS_BUFFER_OVERFLOW REG_BIT(1)
#define OAG_OASTATUS_REPORT_LOST REG_BIT(0)
+#define OAG_MMIOTRIGGER XE_REG(0xdb1c)
+
/* OAC unit */
#define OAC_OACONTROL XE_REG(0x15114)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 97779cbb83ee8..13c6e516d9169 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -525,6 +525,16 @@ static int __xe_oa_read(struct xe_oa_stream *stream, char __user *buf,
oastatus = xe_mmio_read32(stream->gt, oastatus_reg);
}
+ if (oastatus & OAG_OASTATUS_MMIO_TRG_Q_FULL) {
+ ret = xe_oa_append_status(stream, buf, count, offset,
+ DRM_XE_OA_RECORD_OA_MMIO_TRG_Q_FULL);
+ if (ret)
+ return ret;
+
+ xe_mmio_rmw32(stream->gt, oastatus_reg,
+ OAG_OASTATUS_MMIO_TRG_Q_FULL, 0);
+ }
+
if (oastatus & OAG_OASTATUS_REPORT_LOST) {
ret = xe_oa_append_status(stream, buf, count, offset,
DRM_XE_OA_RECORD_OA_REPORT_LOST);
@@ -835,6 +845,13 @@ static int xe_oa_configure_oa_context(struct xe_oa_stream *stream, bool enable)
#define HAS_OA_BPC_REPORTING(xe) (GRAPHICS_VERx100(xe) >= 1255)
+static u32 oag_configure_mmio_trigger(const struct xe_oa_stream *stream, bool enable)
+{
+ return _MASKED_FIELD(OAG_OA_DEBUG_DISABLE_MMIO_TRG,
+ enable && stream && stream->sample ?
+ 0 : OAG_OA_DEBUG_DISABLE_MMIO_TRG);
+}
+
static void xe_oa_disable_metric_set(struct xe_oa_stream *stream)
{
u32 sqcnt1;
@@ -850,6 +867,9 @@ static void xe_oa_disable_metric_set(struct xe_oa_stream *stream)
_MASKED_BIT_DISABLE(DISABLE_DOP_GATING));
}
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_debug,
+ oag_configure_mmio_trigger(stream, false));
+
/* disable the context save/restore or OAR counters */
if (stream->exec_q)
xe_oa_configure_oa_context(stream, false);
@@ -1031,9 +1051,17 @@ static int xe_oa_enable_metric_set(struct xe_oa_stream *stream)
oa_debug = OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
OAG_OA_DEBUG_INCLUDE_CLK_RATIO;
+ if (GRAPHICS_VER(stream->oa->xe) >= 20)
+ oa_debug |=
+ /* The three bits below are needed to get PEC counters running */
+ OAG_OA_DEBUG_START_TRIGGER_SCOPE_CONTROL |
+ OAG_OA_DEBUG_DISABLE_START_TRG_2_COUNT_QUAL |
+ OAG_OA_DEBUG_DISABLE_START_TRG_1_COUNT_QUAL;
+
xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_debug,
_MASKED_BIT_ENABLE(oa_debug) |
- oag_report_ctx_switches(stream));
+ oag_report_ctx_switches(stream) |
+ oag_configure_mmio_trigger(stream, true));
xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_ctx_ctrl, stream->periodic ?
(OAG_OAGLBCTXCTRL_COUNTER_RESUME |
@@ -2259,6 +2287,10 @@ static void __xe_oa_init_oa_units(struct xe_gt *gt)
u->type = DRM_XE_OA_UNIT_TYPE_OAM;
}
+ /* Ensure MMIO triggers remain disabled till there is a stream */
+ xe_mmio_write32(gt, u->regs.oa_debug,
+ oag_configure_mmio_trigger(NULL, false));
+
/* Set oa_unit_ids now to ensure ids remain contiguous */
u->oa_unit_id = gt_to_xe(gt)->oa.oa_unit_ids++;
}
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index e66ae1bdaf9c0..267af6759332b 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -7,6 +7,7 @@
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
+#include "regs/xe_oa_regs.h"
#include "xe_gt_types.h"
#include "xe_platform_types.h"
#include "xe_rtp.h"
@@ -56,6 +57,28 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
RING_FORCE_TO_NONPRIV_DENY,
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
},
+ { XE_RTP_NAME("oa_reg_render"),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED),
+ ENGINE_CLASS(RENDER)),
+ XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER,
+ RING_FORCE_TO_NONPRIV_ACCESS_RW),
+ WHITELIST(OAG_OASTATUS,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD),
+ WHITELIST(OAG_OAHEADPTR,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4))
+ },
+ { XE_RTP_NAME("oa_reg_compute"),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED),
+ ENGINE_CLASS(COMPUTE)),
+ XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER,
+ RING_FORCE_TO_NONPRIV_ACCESS_RW),
+ WHITELIST(OAG_OASTATUS,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD),
+ WHITELIST(OAG_OAHEADPTR,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4))
+ },
{}
};
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 5f41c5bfe5e0e..34cd7d5206834 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1357,6 +1357,9 @@ enum drm_xe_oa_record_type {
*/
DRM_XE_OA_RECORD_OA_BUFFER_LOST = 3,
+ /** @DRM_XE_OA_RECORD_OA_MMIO_TRG_Q_FULL: Status indicating MMIO trigger queue full */
+ DRM_XE_OA_RECORD_OA_MMIO_TRG_Q_FULL = 4,
+
DRM_XE_OA_RECORD_MAX /* non-ABI */
};
--
2.41.0
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