[PATCH v2 1/2] drm/xe: Restrict huge PTEs to 1GiB

Welty, Brian brian.welty at intel.com
Fri Dec 8 19:35:24 UTC 2023



On 12/8/2023 3:29 AM, Thomas Hellström wrote:
> Add a define for the highest level for which we can encode a huge PTE,
> and use it for page-table building. Also update an assert that checks that
> we don't try to encode for larger sizes.
> 
> Signed-off-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>

Reviewed-by: Brian Welty <brian.welty at intel.com>

> ---
>   drivers/gpu/drm/xe/xe_pt.c | 3 +++
>   drivers/gpu/drm/xe/xe_pt.h | 3 +++
>   drivers/gpu/drm/xe/xe_vm.c | 2 +-
>   3 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index 35bd7940a571..699a255d75f5 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -430,6 +430,9 @@ static bool xe_pt_hugepte_possible(u64 addr, u64 next, unsigned int level,
>   {
>   	u64 size, dma;
>   
> +	if (level > MAX_HUGEPTE_LEVEL)
> +		return false;
> +
>   	/* Does the virtual range requested cover a huge pte? */
>   	if (!xe_pt_covers(addr, next, level, &xe_walk->base))
>   		return false;
> diff --git a/drivers/gpu/drm/xe/xe_pt.h b/drivers/gpu/drm/xe/xe_pt.h
> index d5460e58dbbf..ba2f3325c84d 100644
> --- a/drivers/gpu/drm/xe/xe_pt.h
> +++ b/drivers/gpu/drm/xe/xe_pt.h
> @@ -18,6 +18,9 @@ struct xe_tile;
>   struct xe_vm;
>   struct xe_vma;
>   
> +/* Largest huge pte is currently 1GiB. May become device dependent. */
> +#define MAX_HUGEPTE_LEVEL 2
> +
>   #define xe_pt_write(xe, map, idx, data) \
>   	xe_map_wr(xe, map, (idx) * sizeof(u64), u64, data)
>   
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index e09050f16f07..f585cc7df071 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -1239,7 +1239,7 @@ static u64 pte_encode_pat_index(struct xe_device *xe, u16 pat_index,
>   
>   static u64 pte_encode_ps(u32 pt_level)
>   {
> -	XE_WARN_ON(pt_level > 2);
> +	XE_WARN_ON(pt_level > MAX_HUGEPTE_LEVEL);
>   
>   	if (pt_level == 1)
>   		return XE_PDE_PS_2M;


More information about the Intel-xe mailing list