[PATCH v7 01/10] drm/xe/xe2: Determine bios enablement for flat ccs on igfx
Thomas Hellström
thomas.hellstrom at linux.intel.com
Tue Dec 12 12:23:43 UTC 2023
On 12/11/23 14:43, Himal Prasad Ghimiray wrote:
> If bios disables flat ccs on igfx make has_flat_ccs as 0 and notify
> via drm_info.
>
> Bspec:59255
>
> v2:
> - Release forcewake.
> - Add registers in order.
> - drop dgfx condition and only add it back in the future
> when the support for an Xe2 dgpu will be added.
> - Use drm_dbg instead of drm_info. (Matt)
>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
Acked-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +++
> drivers/gpu/drm/xe/xe_device.c | 30 ++++++++++++++++++++++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 5f5a72e9d0d8..f5bf4c6d1761 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -162,6 +162,9 @@
> #define XEHP_SQCM XE_REG_MCR(0x8724)
> #define EN_32B_ACCESS REG_BIT(30)
>
> +#define XE2_FLAT_CCS_BASE_RANGE_LOWER XE_REG_MCR(0x8800)
> +#define XE2_FLAT_CCS_ENABLE REG_BIT(0)
> +
> #define GSCPSMI_BASE XE_REG(0x880c)
>
> #define MIRROR_FUSE3 XE_REG(0x9118)
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 2e0b2e40d8f3..91f5807d2d20 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -16,6 +16,7 @@
> #include <drm/xe_drm.h>
>
> #include "regs/xe_regs.h"
> +#include "regs/xe_gt_regs.h"
> #include "xe_bo.h"
> #include "xe_debugfs.h"
> #include "xe_display.h"
> @@ -26,6 +27,7 @@
> #include "xe_exec.h"
> #include "xe_ggtt.h"
> #include "xe_gt.h"
> +#include "xe_gt_mcr.h"
> #include "xe_irq.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> @@ -401,6 +403,30 @@ int xe_device_probe_early(struct xe_device *xe)
> return 0;
> }
>
> +static int xe_device_set_has_flat_ccs(struct xe_device *xe)
> +{
> + u32 reg;
> + int err;
> +
> + if (GRAPHICS_VER(xe) < 20 || !xe->info.has_flat_ccs)
> + return 0;
> +
> + struct xe_gt *gt = xe_root_mmio_gt(xe);
> +
> + err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> + if (err)
> + return err;
> +
> + reg = xe_gt_mcr_unicast_read_any(gt, XE2_FLAT_CCS_BASE_RANGE_LOWER);
> + xe->info.has_flat_ccs = (reg & XE2_FLAT_CCS_ENABLE);
> +
> + if (!xe->info.has_flat_ccs)
> + drm_dbg(&xe->drm,
> + "Flat CCS has been disabled in bios, May lead to performance impact");
> +
> + return xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
> +}
> +
> int xe_device_probe(struct xe_device *xe)
> {
> struct xe_tile *tile;
> @@ -456,6 +482,10 @@ int xe_device_probe(struct xe_device *xe)
> goto err_irq_shutdown;
> }
>
> + err = xe_device_set_has_flat_ccs(xe);
> + if (err)
> + return err;
> +
> err = xe_mmio_probe_vram(xe);
> if (err)
> goto err_irq_shutdown;
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