[PATCH 00/10] Introduce VF specific interrupts handler
Michal Wajdeczko
michal.wajdeczko at intel.com
Tue Dec 12 21:00:44 UTC 2023
There are small differences in handling of the register based
interrupts on the VF driver as some registers are not accessible
to the VF driver. Additionally VFs must support Memory Based
Interrupts.
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: Matt Roper <matthew.d.roper at intel.com>
Cc: Michal Winiarski <michal.winiarski at intel.com>
Michal Wajdeczko (10):
drm/xe: Add device flag for memory based IRQ support
drm/xe: Add command MI_LOAD_REGISTER_MEM
drm/xe: Define registers used by memory based irq processing
drm/xe: Update LRC context layout definitions
drm/xe: Update definition of GT_INTR_DW
drm/xe: Define IRQ offsets used by HW engines
drm/xe/vf: Introduce Memory Based Interrupts Handler
drm/xe/vf: Update LRC with memory based interrupts data
drm/xe/vf: Setup memory based interrupts in GuC
drm/xe/vf: Add VF specific interrupt handler
drivers/gpu/drm/xe/Makefile | 4 +-
.../gpu/drm/xe/instructions/xe_mi_commands.h | 3 +
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 9 +
drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 9 +
drivers/gpu/drm/xe/xe_device.c | 7 +
drivers/gpu/drm/xe/xe_device.h | 5 +
drivers/gpu/drm/xe/xe_device_types.h | 7 +
drivers/gpu/drm/xe/xe_guc.c | 12 +
drivers/gpu/drm/xe/xe_hw_engine.c | 28 ++
drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
drivers/gpu/drm/xe/xe_irq.c | 71 +++
drivers/gpu/drm/xe/xe_lrc.c | 24 +
drivers/gpu/drm/xe/xe_memirq.c | 429 ++++++++++++++++++
drivers/gpu/drm/xe/xe_memirq.h | 26 ++
drivers/gpu/drm/xe/xe_memirq_types.h | 37 ++
drivers/gpu/drm/xe/xe_pci.c | 2 +
17 files changed, 676 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/xe/xe_memirq.c
create mode 100644 drivers/gpu/drm/xe/xe_memirq.h
create mode 100644 drivers/gpu/drm/xe/xe_memirq_types.h
--
2.25.1
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