[PATCH 04/17] drm/xe/oa/uapi: Add OA data formats
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Tue Dec 19 01:11:37 UTC 2023
On Thu, Dec 07, 2023 at 10:43:16PM -0800, Ashutosh Dixit wrote:
>Add and initialize supported OA data formats for various platforms
>(including Xe2). User can request OA data in any supported format.
>
>Bspec: 52198, 60942, 61101
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
>---
> drivers/gpu/drm/xe/xe_device_types.h | 4 ++
> drivers/gpu/drm/xe/xe_oa.c | 94 ++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 2 +
> drivers/gpu/drm/xe/xe_oa_types.h | 78 +++++++++++++++++++++++
> include/uapi/drm/xe_drm.h | 10 +++
> 5 files changed, 188 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
>
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index 9a212dbdb8a49..842ca8b1a7408 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -15,6 +15,7 @@
> #include "xe_devcoredump_types.h"
> #include "xe_heci_gsc.h"
> #include "xe_gt_types.h"
>+#include "xe_oa.h"
> #include "xe_platform_types.h"
> #include "xe_pt_types.h"
> #include "xe_pmu.h"
>@@ -418,6 +419,9 @@ struct xe_device {
> /** @heci_gsc: graphics security controller */
> struct xe_heci_gsc heci_gsc;
>
>+ /** @oa: oa perf counter subsystem */
>+ struct xe_oa oa;
>+
> /** @needs_flr_on_fini: requests function-reset on fini */
> bool needs_flr_on_fini;
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index f4cacb4af47c5..11662a81ef6d8 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -13,15 +13,109 @@ static u32 xe_oa_max_sample_rate = 100000;
>
> static struct ctl_table_header *sysctl_header;
>
>+#define DRM_FMT(x) DRM_XE_OA_FMT_TYPE_##x
>+
>+static const struct xe_oa_format oa_formats[] = {
>+ [XE_OA_FORMAT_C4_B8] = { 7, 64 },
>+ [XE_OA_FORMAT_A12] = { 0, 64 },
>+ [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
>+ [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, DRM_FMT(OAR) },
>+ [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
>+ [XE_OAC_FORMAT_A24u64_B8_C8] = { 1, 320, DRM_FMT(OAC), HDR_64_BIT },
>+ [XE_OAC_FORMAT_A22u32_R2u32_B8_C8] = { 2, 192, DRM_FMT(OAC), HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, DRM_FMT(OAM_MPEC), HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, DRM_FMT(OAM_MPEC), HDR_64_BIT },
>+ [XE_OA_FORMAT_PEC64u64] = { 1, 576, DRM_FMT(PEC), HDR_64_BIT, 1, 0 },
>+ [XE_OA_FORMAT_PEC64u64_B8_C8] = { 1, 640, DRM_FMT(PEC), HDR_64_BIT, 1, 1 },
>+ [XE_OA_FORMAT_PEC64u32] = { 1, 320, DRM_FMT(PEC), HDR_64_BIT },
>+ [XE_OA_FORMAT_PEC32u64_G1] = { 5, 320, DRM_FMT(PEC), HDR_64_BIT, 1, 0 },
>+ [XE_OA_FORMAT_PEC32u32_G1] = { 5, 192, DRM_FMT(PEC), HDR_64_BIT },
>+ [XE_OA_FORMAT_PEC32u64_G2] = { 6, 320, DRM_FMT(PEC), HDR_64_BIT, 1, 0 },
>+ [XE_OA_FORMAT_PEC32u32_G2] = { 6, 192, DRM_FMT(PEC), HDR_64_BIT },
>+ [XE_OA_FORMAT_PEC36u64_G1_32_G2_4] = { 3, 320, DRM_FMT(PEC), HDR_64_BIT, 1, 0 },
>+ [XE_OA_FORMAT_PEC36u64_G1_4_G2_32] = { 4, 320, DRM_FMT(PEC), HDR_64_BIT, 1, 0 },
>+};
>+
>+static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
>+{
>+ __set_bit(format, oa->format_mask);
>+}
>+
>+static void xe_oa_init_supported_formats(struct xe_oa *oa)
>+{
>+ switch (oa->xe->info.platform) {
>+ case XE_TIGERLAKE:
>+ case XE_ROCKETLAKE:
>+ case XE_ALDERLAKE_S:
>+ case XE_ALDERLAKE_P:
>+ case XE_ALDERLAKE_N:
>+ case XE_DG1:
>+ oa_format_add(oa, XE_OA_FORMAT_A12);
>+ oa_format_add(oa, XE_OA_FORMAT_A12_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_C4_B8);
>+ break;
>+
>+ case XE_DG2:
>+ case XE_PVC:
>+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
>+ oa_format_add(oa, XE_OAC_FORMAT_A24u64_B8_C8);
>+ oa_format_add(oa, XE_OAC_FORMAT_A22u32_R2u32_B8_C8);
>+ break;
>+
>+ case XE_METEORLAKE:
>+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
>+ oa_format_add(oa, XE_OAC_FORMAT_A24u64_B8_C8);
>+ oa_format_add(oa, XE_OAC_FORMAT_A22u32_R2u32_B8_C8);
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
>+ break;
>+
>+ case XE_LUNARLAKE:
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC64u64);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC64u64_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC64u32);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC32u64_G1);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC32u32_G1);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC32u64_G2);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC32u32_G2);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC36u64_G1_32_G2_4);
>+ oa_format_add(oa, XE_OA_FORMAT_PEC36u64_G1_4_G2_32);
>+ break;
>+
>+ default:
>+ drm_err(&oa->xe->drm, "Unknown platform\n");
>+ }
>+}
>+
> int xe_oa_init(struct xe_device *xe)
> {
>+ struct xe_oa *oa = &xe->oa;
>+
>+ /* Support OA only with GuC submission and Gen12+ */
>+ if (XE_WARN_ON(!xe_device_uc_enabled(xe)) || XE_WARN_ON(GRAPHICS_VER(xe) < 12))
>+ return 0;
>+
>+ oa->xe = xe;
>+ oa->oa_formats = oa_formats;
>+
> /* Choose a representative limit */
> xe_oa_sample_rate_hard_limit = xe_root_mmio_gt(xe)->info.reference_clock / 2;
>+
>+ xe_oa_init_supported_formats(oa);
> return 0;
> }
>
> void xe_oa_fini(struct xe_device *xe)
> {
>+ struct xe_oa *oa = &xe->oa;
>+
>+ oa->xe = NULL;
> }
>
> static struct ctl_table oa_ctl_table[] = {
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>index 1b81330c9708b..2145c73176953 100644
>--- a/drivers/gpu/drm/xe/xe_oa.h
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -6,6 +6,8 @@
> #ifndef _XE_OA_H_
> #define _XE_OA_H_
>
>+#include "xe_oa_types.h"
>+
> struct xe_device;
>
> int xe_oa_init(struct xe_device *xe);
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>new file mode 100644
>index 0000000000000..3758bd2879cbb
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -0,0 +1,78 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#ifndef _XE_OA_TYPES_H_
>+#define _XE_OA_TYPES_H__
>+
>+#include <linux/math.h>
>+#include <linux/types.h>
>+
>+enum xe_oa_report_header {
>+ HDR_32_BIT = 0,
>+ HDR_64_BIT,
>+};
>+
>+enum xe_oa_format_name {
>+ XE_OA_FORMAT_C4_B8 = 7,
7? Leaving room for old formats? Not sure if it adds any value. Do you
anticipate this driver being supported on pre-gen12? If not, IMO, we
should just start with 0 OR 1 (if you want to use 0 for some special
case.
rest of it, lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Umesh
>+
>+ /* Gen8+ */
>+ XE_OA_FORMAT_A12,
>+ XE_OA_FORMAT_A12_B8_C8,
>+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>+
>+ /* DG2 */
>+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>+
>+ /* DG2/MTL OAC */
>+ XE_OAC_FORMAT_A24u64_B8_C8,
>+ XE_OAC_FORMAT_A22u32_R2u32_B8_C8,
>+
>+ /* MTL OAM */
>+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
>+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
>+
>+ /* Xe2+ */
>+ XE_OA_FORMAT_PEC64u64,
>+ XE_OA_FORMAT_PEC64u64_B8_C8,
>+ XE_OA_FORMAT_PEC64u32,
>+ XE_OA_FORMAT_PEC32u64_G1,
>+ XE_OA_FORMAT_PEC32u32_G1,
>+ XE_OA_FORMAT_PEC32u64_G2,
>+ XE_OA_FORMAT_PEC32u32_G2,
>+ XE_OA_FORMAT_PEC36u64_G1_32_G2_4,
>+ XE_OA_FORMAT_PEC36u64_G1_4_G2_32,
>+
>+ XE_OA_FORMAT_MAX,
>+};
>+
>+/**
>+ * struct xe_oa_format - Format fields for supported OA formats
>+ */
>+struct xe_oa_format {
>+ u32 counter_select;
>+ int size;
>+ int type;
>+ enum xe_oa_report_header header;
>+ u16 counter_size;
>+ u16 bc_report;
>+};
>+
>+/**
>+ * struct xe_oa - OA device level information
>+ */
>+struct xe_oa {
>+ /** @xe: back pointer to xe device */
>+ struct xe_device *xe;
>+
>+ /** @oa_formats: tracks all OA formats across platforms */
>+ const struct xe_oa_format *oa_formats;
>+
>+#define FORMAT_MASK_SIZE DIV_ROUND_UP(XE_OA_FORMAT_MAX - 1, BITS_PER_LONG)
>+
>+ /** @format_mask: tracks valid OA formats for a platform */
>+ unsigned long format_mask[FORMAT_MASK_SIZE];
>+};
>+#endif
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index 3539e0781d700..5bfb2d5aba12a 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -1175,6 +1175,16 @@ enum drm_xe_perf_ioctls {
> DRM_XE_PERF_IOCTL_CONFIG = _IO('i', 0x2),
> };
>
>+/** enum drm_xe_oa_format_type - OA format types */
>+enum drm_xe_oa_format_type {
>+ DRM_XE_OA_FMT_TYPE_OAG,
>+ DRM_XE_OA_FMT_TYPE_OAR,
>+ DRM_XE_OA_FMT_TYPE_OAM,
>+ DRM_XE_OA_FMT_TYPE_OAC,
>+ DRM_XE_OA_FMT_TYPE_OAM_MPEC,
>+ DRM_XE_OA_FMT_TYPE_PEC,
>+};
>+
> #if defined(__cplusplus)
> }
> #endif
>-- 2.41.0
>
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