[PATCH 11/17] drm/xe/oa: Disable overrun mode for Xe2+ OAG
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Wed Dec 20 03:05:56 UTC 2023
On Thu, Dec 07, 2023 at 10:43:23PM -0800, Ashutosh Dixit wrote:
>Xe2+ OAG requires special handling because non-power-of-2 report sizes are
>not a sub-multiple of the OA buffer size and there are no partial reports
>at the end of the buffer. This issue is present only when overrun mode is
>enabled. Avoid adding this special handling by disabling overrun mode for
>Xe2+ OAG.
Like you mentioned earlier, maybe disable overrun for all platforms OR
have the user control the setting.
Otherwise, this is
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
>---
> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 1 +
> drivers/gpu/drm/xe/xe_oa.c | 8 ++++++++
> 2 files changed, 9 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>index 4455a5a42b01b..7e2e875ccf80a 100644
>--- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>@@ -52,6 +52,7 @@
> #define OABUFFER_SIZE_4M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 5)
> #define OABUFFER_SIZE_8M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 6)
> #define OABUFFER_SIZE_16M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 7)
>+#define OAG_OABUFFER_DISABLE_OVERRUN_MODE REG_BIT(1)
> #define OAG_OABUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
>
> #define OAG_OACONTROL XE_REG(0xdaf4)
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 5744436188dcd..073476721377d 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -408,6 +408,14 @@ static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
> gtt_offset & OAG_OAHEADPTR_MASK);
> stream->oa_buffer.head = 0;
>
>+ /*
>+ * For Xe2+, OAG buffer is not a multiple of report size and there are no partial
>+ * reports at the end of the buffer when overrun mode is enabled. Disable overrun
>+ * mode to avoid this issue.
>+ */
>+ if (GRAPHICS_VER(stream->oa->xe) >= 20 &&
>+ stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG)
>+ oa_buf |= OAG_OABUFFER_DISABLE_OVERRUN_MODE;
> /*
> * PRM says: "This MMIO must be set before the OATAILPTR register and after the
> * OAHEADPTR register. This is to enable proper functionality of the overflow bit".
>--
>2.41.0
>
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