[Intel-xe] [PATCH 6/6] drm/xe: move xe PM-related display logic to xe_display.c
Rodrigo Vivi
rodrigo.vivi at intel.com
Fri Feb 3 20:27:42 UTC 2023
From: Mauro Carvalho Chehab <mchehab at kernel.org>
It is very ugly to read code with lots of ifdefs. Also, it makes
harder when the display part can be disabled in runtime.
Move the PM-related core to xe_display.c, making the code
clearer and more modular.
Signed-off-by: Mauro Carvalho Chehab <mchehab at kernel.org>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
drivers/gpu/drm/xe/xe_display.c | 98 +++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_display.h | 12 ++++
drivers/gpu/drm/xe/xe_pm.c | 121 ++------------------------------
3 files changed, 115 insertions(+), 116 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_display.c b/drivers/gpu/drm/xe/xe_display.c
index 262d8e06b51f..47a16a3f85fa 100644
--- a/drivers/gpu/drm/xe/xe_display.c
+++ b/drivers/gpu/drm/xe/xe_display.c
@@ -5,7 +5,6 @@
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
-#include "xe_device.h"
#include "xe_display.h"
#include "xe_module.h"
@@ -17,13 +16,18 @@
#include "display/intel_audio.h"
#include "display/intel_bw.h"
#include "display/intel_display.h"
+#include "display/intel_display_types.h"
+#include "display/intel_dp.h"
#include "display/intel_fbdev.h"
#include "display/intel_hdcp.h"
+#include "display/intel_hotplug.h"
#include "display/intel_opregion.h"
#include "display/ext/i915_irq.h"
#include "display/ext/intel_dram.h"
#include "display/ext/intel_pm.h"
+#include <linux/fb.h>
+
/* Xe device functions */
int xe_display_enable(struct pci_dev *pdev, struct drm_driver *driver)
@@ -224,4 +228,96 @@ void xe_display_irq_postinstall(struct xe_device *xe, struct xe_gt *gt)
gen11_display_irq_postinstall(xe);
}
+static void intel_suspend_encoders(struct xe_device *xe)
+{
+ struct drm_device *dev = &xe->drm;
+ struct intel_encoder *encoder;
+
+ if (!xe->info.display.pipe_mask)
+ return;
+
+ drm_modeset_lock_all(dev);
+ for_each_intel_encoder(dev, encoder)
+ if (encoder->suspend)
+ encoder->suspend(encoder);
+ drm_modeset_unlock_all(dev);
+}
+
+void xe_display_pm_suspend(struct xe_device *xe)
+{
+ if (!xe->info.enable_display)
+ return;
+
+ /*
+ * We do a lot of poking in a lot of registers, make sure they work
+ * properly.
+ */
+ intel_power_domains_disable(xe);
+ if (xe->info.display.pipe_mask)
+ drm_kms_helper_poll_disable(&xe->drm);
+
+ intel_display_suspend(&xe->drm);
+
+ intel_dp_mst_suspend(xe);
+
+ intel_hpd_cancel_work(xe);
+
+ intel_suspend_encoders(xe);
+
+ intel_opregion_suspend(xe, PCI_D3cold);
+
+ intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_SUSPENDED, true);
+
+ intel_dmc_ucode_suspend(xe);
+}
+
+void xe_display_pm_suspend_late(struct xe_device *xe)
+{
+ if (!xe->info.enable_display)
+ return;
+
+ intel_power_domains_suspend(xe, I915_DRM_SUSPEND_MEM);
+
+ intel_display_power_suspend_late(xe);
+}
+
+void xe_display_pm_resume_early(struct xe_device *xe)
+{
+ if (!xe->info.enable_display)
+ return;
+
+ intel_display_power_resume_early(xe);
+
+ intel_power_domains_resume(xe);
+}
+
+void xe_display_pm_resume(struct xe_device *xe)
+{
+ if (!xe->info.enable_display)
+ return;
+
+ intel_dmc_ucode_resume(xe);
+
+ if (xe->info.display.pipe_mask)
+ drm_mode_config_reset(&xe->drm);
+
+ intel_modeset_init_hw(xe);
+ intel_init_clock_gating(xe);
+ intel_hpd_init(xe);
+
+ /* MST sideband requires HPD interrupts enabled */
+ intel_dp_mst_resume(xe);
+ intel_display_resume(&xe->drm);
+
+ intel_hpd_poll_disable(xe);
+ if (xe->info.display.pipe_mask)
+ drm_kms_helper_poll_enable(&xe->drm);
+
+ intel_opregion_resume(xe);
+
+ intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_RUNNING, false);
+
+ intel_power_domains_enable(xe);
+}
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_display.h b/drivers/gpu/drm/xe/xe_display.h
index 11f98ccfaf4e..03117a7067dc 100644
--- a/drivers/gpu/drm/xe/xe_display.h
+++ b/drivers/gpu/drm/xe/xe_display.h
@@ -9,6 +9,8 @@
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#include <drm/drm_drv.h>
+#include "xe_device.h"
+
#include "display/intel_opregion.h"
#include "display/ext/i915_irq.h"
@@ -36,6 +38,11 @@ void xe_display_irq_enable(struct xe_device *xe, u32 gu_misc_iir);
void xe_display_irq_reset(struct xe_device *xe);
void xe_display_irq_postinstall(struct xe_device *xe, struct xe_gt *gt);
+void xe_display_pm_suspend(struct xe_device *xe);
+void xe_display_pm_suspend_late(struct xe_device *xe);
+void xe_display_pm_resume_early(struct xe_device *xe);
+void xe_display_pm_resume(struct xe_device *xe);
+
#else
static inline int
xe_display_enable(struct pci_dev *pdev, struct drm_driver *driver) { return 0; };
@@ -69,5 +76,10 @@ static inline void xe_display_irq_enable(struct xe_device *xe, u32 gu_misc_iir)
static inline void xe_display_irq_reset(struct xe_device *xe) {};
static inline void xe_display_irq_postinstall(struct xe_device *xe, struct xe_gt *gt) {};
+static inline void xe_display_pm_suspend(struct xe_device *xe) {};
+static inline void xe_display_pm_suspend_late(struct xe_device *xe) {};
+static inline void xe_display_pm_resume_early(struct xe_device *xe) {};
+static inline void xe_display_pm_resume(struct xe_device *xe) {};
+
#endif /* CONFIG_DRM_XE_DISPLAY */
#endif /* _XE_DISPLAY_H_ */
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 4b3a1d8a8adf..44c38e670587 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -10,22 +10,13 @@
#include "xe_bo.h"
#include "xe_bo_evict.h"
#include "xe_device.h"
+#include "xe_display.h"
#include "xe_pm.h"
#include "xe_gt.h"
#include "xe_ggtt.h"
#include "xe_irq.h"
#include "xe_pcode.h"
-#include <linux/fb.h>
-
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
-#include "display/intel_display_types.h"
-#include "display/intel_dp.h"
-#include "display/intel_fbdev.h"
-#include "display/intel_hotplug.h"
-#include "display/ext/intel_pm.h"
-#endif
-
/**
* DOC: Xe Power Management
*
@@ -46,106 +37,6 @@
* and no wait boost. Frequency optimizations should come on a next stage.
*/
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
-static void intel_suspend_encoders(struct xe_device *xe)
-{
- struct drm_device *dev = &xe->drm;
- struct intel_encoder *encoder;
-
- if (!xe->info.enable_display || !xe->info.display.pipe_mask)
- return;
-
- drm_modeset_lock_all(dev);
- for_each_intel_encoder(dev, encoder)
- if (encoder->suspend)
- encoder->suspend(encoder);
- drm_modeset_unlock_all(dev);
-}
-#endif
-
-static void xe_pm_display_suspend(struct xe_device *xe)
-{
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
- if (!xe->info.enable_display)
- return;
-
- /* We do a lot of poking in a lot of registers, make sure they work
- * properly. */
- intel_power_domains_disable(xe);
- if (xe->info.display.pipe_mask)
- drm_kms_helper_poll_disable(&xe->drm);
-
- intel_display_suspend(&xe->drm);
-
- intel_dp_mst_suspend(xe);
-
- intel_hpd_cancel_work(xe);
-
- intel_suspend_encoders(xe);
-
- intel_opregion_suspend(xe, PCI_D3cold);
-
- intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_SUSPENDED, true);
-
- intel_dmc_ucode_suspend(xe);
-#endif
-}
-
-static void xe_pm_display_suspend_late(struct xe_device *xe)
-{
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
- if (!xe->info.enable_display)
- return;
-
- intel_power_domains_suspend(xe, I915_DRM_SUSPEND_MEM);
-
- intel_display_power_suspend_late(xe);
-#endif
-}
-
-static void xe_pm_display_resume_early(struct xe_device *xe)
-{
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
- if (!xe->info.enable_display)
- return;
-
- intel_display_power_resume_early(xe);
-
- intel_power_domains_resume(xe);
-#endif
-}
-
-static void xe_pm_display_resume(struct xe_device *xe)
-{
-#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
- if (!xe->info.enable_display)
- return;
-
- intel_dmc_ucode_resume(xe);
-
- if (xe->info.display.pipe_mask)
- drm_mode_config_reset(&xe->drm);
-
- intel_modeset_init_hw(xe);
- intel_init_clock_gating(xe);
- intel_hpd_init(xe);
-
- /* MST sideband requires HPD interrupts enabled */
- intel_dp_mst_resume(xe);
- intel_display_resume(&xe->drm);
-
- intel_hpd_poll_disable(xe);
- if (xe->info.display.pipe_mask)
- drm_kms_helper_poll_enable(&xe->drm);
-
- intel_opregion_resume(xe);
-
- intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_RUNNING, false);
-
- intel_power_domains_enable(xe);
-#endif
-}
-
/**
* xe_pm_suspend - Helper for System suspend, i.e. S0->S3 / S0->S2idle
* @xe: xe device instance
@@ -166,19 +57,19 @@ int xe_pm_suspend(struct xe_device *xe)
if (err)
return err;
- xe_pm_display_suspend(xe);
+ xe_display_pm_suspend(xe);
for_each_gt(gt, xe, id) {
err = xe_gt_suspend(gt);
if (err) {
- xe_pm_display_resume(xe);
+ xe_display_pm_resume(xe);
return err;
}
}
xe_irq_suspend(xe);
- xe_pm_display_suspend_late(xe);
+ xe_display_pm_suspend_late(xe);
return 0;
}
@@ -201,7 +92,7 @@ int xe_pm_resume(struct xe_device *xe)
return err;
}
- xe_pm_display_resume_early(xe);
+ xe_display_pm_resume_early(xe);
/*
* This only restores pinned memory which is the memory required for the
@@ -213,7 +104,7 @@ int xe_pm_resume(struct xe_device *xe)
xe_irq_resume(xe);
- xe_pm_display_resume(xe);
+ xe_display_pm_resume(xe);
for_each_gt(gt, xe, id)
xe_gt_resume(gt);
--
2.39.1
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